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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-07 14:18:28 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-16 15:19:33 +0000 |
| commit | 4663f45caa2352760ee08ec28b9c2d6e2e8823f9 (patch) | |
| tree | cde34a0beabcd41ffbda765e7f9dd3d036bbe5cd /src/device | |
| parent | 34cf5619f929775efd819468ba6036e637cfbd85 (diff) | |
| download | coreboot-4663f45caa2352760ee08ec28b9c2d6e2e8823f9.tar.xz | |
device/pci_ops: Have only default PCI bus ops available
In the current state of the tree we do not utilise the
mechanism of having per-device overrides for PCI bus
ops.
This change effectively inlines all PCI config accessors
for ramstage as well.
Change-Id: I11c37cadfcbef8fb5657dec6d620e6bccab311a4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31753
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/device')
| -rw-r--r-- | src/device/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/device/pci_ops_mmconf.c | 39 |
2 files changed, 0 insertions, 40 deletions
diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index c325a7e5bd..711a403353 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -33,7 +33,6 @@ ramstage-$(CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT) += hypertransport.c ramstage-$(CONFIG_PCIX_PLUGIN_SUPPORT) += pcix_device.c ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c -ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c endif subdirs-y += oprom dram diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c deleted file mode 100644 index 2fcb96174f..0000000000 --- a/src/device/pci_ops_mmconf.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/mmio.h> -#include <device/pci.h> -#include <device/pci_ops.h> -#include <device/pci_mmio_cfg.h> - -#if (CONFIG_MMCONF_BASE_ADDRESS == 0) -#error "CONFIG_MMCONF_BASE_ADDRESS needs to be non-zero!" -#endif - -/* - * Functions for accessing PCI configuration space with mmconf accesses - */ - -static const struct pci_bus_operations pci_ops_mmconf = { - .read8 = pci_mmio_read_config8, - .read16 = pci_mmio_read_config16, - .read32 = pci_mmio_read_config32, - .write8 = pci_mmio_write_config8, - .write16 = pci_mmio_write_config16, - .write32 = pci_mmio_write_config32, -}; - -const struct pci_bus_operations *pci_bus_default_ops(void) -{ - return &pci_ops_mmconf; -} |