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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-07-09 07:13:37 +0300
committerNico Huber <nico.h@gmx.de>2020-07-11 14:48:25 +0000
commit2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e (patch)
tree266234c7563d25e45b566eba394b74b14911c1ea /src/drivers
parentbd5c721f6bd099e2fbad4dbde5e72c0b6945dad9 (diff)
downloadcoreboot-2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e.tar.xz
arch/x86: Drop CBMEM_TOP_BACKUP
Code has evolved such that there seems to be little use for global definition of cbmem_top_chipset(). Even for AMD we had three different implementations. Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/drivers')
-rw-r--r--src/drivers/amd/agesa/romstage.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c
index 617416ab7a..29423ef1ba 100644
--- a/src/drivers/amd/agesa/romstage.c
+++ b/src/drivers/amd/agesa/romstage.c
@@ -107,3 +107,9 @@ asmlinkage void car_stage_entry(void)
{
romstage_main();
}
+
+void *cbmem_top_chipset(void)
+{
+ /* Top of CBMEM is at highest usable DRAM address below 4GiB. */
+ return (void *)restore_top_of_low_cacheable();
+}