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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-18 19:40:48 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-19 19:31:08 +0000
commit4f14cd8a39e65811af08296633842289efa42927 (patch)
tree1cece9915f897af008d2d83701088b3054c4ab93 /src/lib
parent6766f4fd046604e6376c9769cd5f8357dec6a80a (diff)
downloadcoreboot-4f14cd8a39e65811af08296633842289efa42927.tar.xz
arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE
If stage cache is enabled, we should not allow S3 resume to load firmware from non-volatile memory. This also adds board reset for failing to load postcar from stage cache. Change-Id: Ib6cc7ad0fe9dcdf05b814d324b680968a2870f23 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37682 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/lib')
-rw-r--r--src/lib/prog_loaders.c12
1 files changed, 3 insertions, 9 deletions
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 57874967ec..978ec16e6a 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -83,14 +83,6 @@ fail:
int __weak prog_locate_hook(struct prog *prog) { return 0; }
-static void ramstage_cache_invalid(void)
-{
- printk(BIOS_ERR, "ramstage cache invalid.\n");
- if (CONFIG(RESET_ON_INVALID_RAMSTAGE_CACHE)) {
- board_reset();
- }
-}
-
static void run_ramstage_from_resume(struct prog *ramstage)
{
if (!romstage_handoff_is_resume())
@@ -105,7 +97,9 @@ static void run_ramstage_from_resume(struct prog *ramstage)
printk(BIOS_DEBUG, "Jumping to image.\n");
prog_run(ramstage);
}
- ramstage_cache_invalid();
+
+ printk(BIOS_ERR, "ramstage cache invalid.\n");
+ board_reset();
}
static int load_relocatable_ramstage(struct prog *ramstage)