diff options
| author | Keith Hui <buurin@gmail.com> | 2020-04-19 00:55:48 -0400 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-11 09:33:23 +0000 |
| commit | edd38465a58d47b737f1e656a8055f64a3b0c421 (patch) | |
| tree | c070c8409efa9728c132b6ad114f1aa628cd6c71 /src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb | |
| parent | 75476ec3038497871741519c59ee2bfe3463e14b (diff) | |
| download | coreboot-edd38465a58d47b737f1e656a8055f64a3b0c421.tar.xz | |
mainboard/asus/p3b-f: Reintroduce as variant of p2b
Fold this last ASUS 440BX board into the P2B family, while bringing in
some changes:
- Devicetree becomes overridetree.
- Remove non-existent IR device and disable ACPI device on Super I/O to
match OEM firmware.
- Add SB GPO settings from OEM firmware to devicetree. This disables
the SPD enabling magic this board needs. By moving the enabling part
to bootblock the hacky enable_spd hook can be eliminated.
- Initialize the serial port in bootblock, like the other boards.
Boot tested on hardware.
Change-Id: I65f2cb9d1bd4c82550de43889e3502526a46bd18
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41047
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb')
| -rw-r--r-- | src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb b/src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb new file mode 100644 index 0000000000..0a608121f6 --- /dev/null +++ b/src/mainboard/asus/p2b/variants/p3b-f/overridetree.cb @@ -0,0 +1,12 @@ +chip northbridge/intel/i440bx # Northbridge + device domain 0 on # PCI domain + chip southbridge/intel/i82371eb # Southbridge + register "gpo" = "0x67ffbfff" # GPIO: This value sets GPIOs 27,28 to expose HWM + device pci 4.0 on # ISA bridge + chip superio/winbond/w83977tf # Super I/O + device pnp 3f0.a off end # ACPI + end + end + end + end +end |