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| author | Stefan Reinauer <stepan@coresystems.de> | 2010-03-29 22:08:01 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-03-29 22:08:01 +0000 |
| commit | 798ef2893c44ce3194c539c8c5db33d11e8edbac (patch) | |
| tree | 405318f804b41070e16ca6b907d65a1e27cc5071 /src/mainboard/intel/d945gclf | |
| parent | 72bdfeb6987f9578ac7fee3f21140ab5853d6179 (diff) | |
| download | coreboot-798ef2893c44ce3194c539c8c5db33d11e8edbac.tar.xz | |
This drops the ASSEMBLY define from romstage.c, too
(since it's not assembly code, this was a dirty hack anyways)
Also run
awk 1 RS= ORS="\n\n" < $FILE > $FILE.nonewlines
mv $FILE.nonewlines $FILE
on romstage.c because my perl -pi -e 's,#define ASSEMBLY 1,,g' */*/romstage.c
cut some holes into the source.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5320 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/mainboard/intel/d945gclf')
| -rw-r--r-- | src/mainboard/intel/d945gclf/romstage.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index ab3576c944..48f3f78e7b 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -19,7 +19,6 @@ // __PRE_RAM__ means: use "unsigned" for device, not a struct. - /* Configuration of the i945 driver */ #define CHIPSET_I945GC 1 #define CHANNEL_XOR_RANDOMIZATION 1 @@ -98,7 +97,6 @@ static void ich7_enable_lpc(void) pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x007c0681); } - /* This box has two superios, so enabling serial becomes slightly excessive. * We disable a lot of stuff to make sure that there are no conflicts between * the two. Also set up the GPIOs from the beginning. This is the "no schematic |