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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-23 19:08:01 +0300 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-07-25 16:03:37 +0000 |
| commit | 17887d08fee6d10bc4ff8758694b88435365e5d7 (patch) | |
| tree | 03ef6c6afe204dd47c26177974b0c7d6cc60f574 /src/mainboard/intel/emeraldlake2 | |
| parent | b14b55daafbd953d04a3bbf9a66bc7fc5ebd277f (diff) | |
| download | coreboot-17887d08fee6d10bc4ff8758694b88435365e5d7.tar.xz | |
mb/*/chromeos.c: Remove some ENV_RAMSTAGE and __SIMPLE_DEVICE__
Use explicit simple PCI config accessors here.
Change-Id: Ifa3814fdd7795479ca5fdbfc4deb3fe8db9805f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34519
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/mainboard/intel/emeraldlake2')
| -rw-r--r-- | src/mainboard/intel/emeraldlake2/chromeos.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/mainboard/intel/emeraldlake2/chromeos.c b/src/mainboard/intel/emeraldlake2/chromeos.c index 699141fc0f..74fe20f548 100644 --- a/src/mainboard/intel/emeraldlake2/chromeos.c +++ b/src/mainboard/intel/emeraldlake2/chromeos.c @@ -15,6 +15,7 @@ #include <string.h> #include <bootmode.h> +#include <boot/coreboot_tables.h> #include <device/pci_ops.h> #include <device/device.h> #include <device/pci.h> @@ -22,9 +23,6 @@ #include <southbridge/intel/common/gpio.h> #include <vendorcode/google/chromeos/chromeos.h> -#if ENV_RAMSTAGE -#include <boot/coreboot_tables.h> - void fill_lb_gpios(struct lb_gpios *gpios) { struct lb_gpio chromeos_gpios[] = { @@ -45,7 +43,6 @@ void fill_lb_gpios(struct lb_gpios *gpios) }; lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios)); } -#endif int get_recovery_mode_switch(void) { |