diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-07-22 18:37:32 +0200 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-08-03 05:32:20 +0000 |
commit | 9addda3c410041ea93ae5587d17460da9a9c312f (patch) | |
tree | 5579f274b2d7e801b819d5711ddbdf96414101c0 /src/northbridge/intel/ironlake/ironlake.h | |
parent | c642a0d8942735b393040b877769f1d4a3a9ebe8 (diff) | |
download | coreboot-9addda3c410041ea93ae5587d17460da9a9c312f.tar.xz |
nb/intel/ironlake: Add Generic Non-Core register definitions
Tested with BUILD_TIMELESS=1, Packard Bell MS2290 does not change.
Change-Id: I4d878b5dbb5a5617143240b8f5bc5b6f5a754511
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43740
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/ironlake/ironlake.h')
-rw-r--r-- | src/northbridge/intel/ironlake/ironlake.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/northbridge/intel/ironlake/ironlake.h b/src/northbridge/intel/ironlake/ironlake.h index 4f9db5b347..325de5b57f 100644 --- a/src/northbridge/intel/ironlake/ironlake.h +++ b/src/northbridge/intel/ironlake/ironlake.h @@ -52,6 +52,10 @@ */ #define QPI_NON_CORE PCI_DEV(QUICKPATH_BUS, 0, 0) +#define MAX_RTIDS 0x60 +#define DESIRED_CORES 0x80 +#define MIRROR_PORT_CTL 0xd0 + /* * SAD - System Address Decoder */ |