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author | Angel Pons <th3fanbus@gmail.com> | 2020-03-21 13:23:32 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-23 19:28:14 +0000 |
commit | 89ae6b8fc2901b56dd1839a2d569493ce668a32c (patch) | |
tree | 7b537bbf2c38c56cff18f38b85f86b52a7c1da04 /src/northbridge/intel/sandybridge/raminit_ivy.c | |
parent | a6a64183d6c5d535df5e62fad419402cd896f03d (diff) | |
download | coreboot-89ae6b8fc2901b56dd1839a2d569493ce668a32c.tar.xz |
nb/intel/sandybridge: Use cached CPUID
Now that we have it, we might as well pass it around.
Tested on Asus P8Z77-V LX2, still boots fine.
Change-Id: Ia5aa2f932321983f11d2f8869aa624832afe9347
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39721
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_ivy.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit_ivy.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_ivy.c b/src/northbridge/intel/sandybridge/raminit_ivy.c index 06d23825b6..a714e535b4 100644 --- a/src/northbridge/intel/sandybridge/raminit_ivy.c +++ b/src/northbridge/intel/sandybridge/raminit_ivy.c @@ -609,7 +609,7 @@ int try_init_dram_ddr3_ivb(ramctr_timing *ctrl, int fast_boot, int s3_resume, in MCHBAR32(SCHED_CBIT) = 0x10100005; /* Set up watermarks and starvation counter */ - set_wmm_behavior(); + set_wmm_behavior(ctrl->cpu); /* Clear IO reset bit */ MCHBAR32(MC_INIT_STATE_G) &= ~(1 << 5); |