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authorAngel Pons <th3fanbus@gmail.com>2020-07-03 20:31:39 +0200
committerAngel Pons <th3fanbus@gmail.com>2020-07-12 10:05:18 +0000
commitd7bf3ad9397a367021e57d204438a178022aaa8c (patch)
tree6adfaa6792bf77ea1369ddccde81d027680b2482 /src/northbridge
parentae4fb10240801ba3e55b83ef2c5cdf99b049d3ea (diff)
downloadcoreboot-d7bf3ad9397a367021e57d204438a178022aaa8c.tar.xz
haswell: Compute disabled channel masks at runtime
All mainboards have a non-zero SPD address to implemented DIMM slots. Knowing this, it is possible to compute the MRC slot population masks automatically instead of hardcoding the values on each mainboard. Change-Id: Ia8f369dd1228d53d64471e48700e870e01e77837 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/43119 Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Michael Niewöhner Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
-rw-r--r--src/northbridge/intel/haswell/romstage.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c
index ee211beab1..7c27827921 100644
--- a/src/northbridge/intel/haswell/romstage.c
+++ b/src/northbridge/intel/haswell/romstage.c
@@ -23,6 +23,17 @@ void __weak mb_late_romstage_setup(void)
{
}
+/*
+ * 0 = leave channel enabled
+ * 1 = disable dimm 0 on channel
+ * 2 = disable dimm 1 on channel
+ * 3 = disable dimm 0+1 on channel
+ */
+static int make_channel_disabled_mask(const struct pei_data *pd, int ch)
+{
+ return (!pd->spd_addresses[ch + ch] << 0) | (!pd->spd_addresses[ch + ch + 1] << 1);
+}
+
/* The romstage entry point for this platform is not mainboard-specific, hence the name */
void mainboard_romstage_entry(void)
{
@@ -73,6 +84,10 @@ void mainboard_romstage_entry(void)
/* MRC has hardcoded assumptions of 2 meaning S3 wake. Normalize it here. */
pei_data.boot_mode = wake_from_s3 ? 2 : 0;
+ /* Calculate unimplemented DIMM slots for each channel */
+ pei_data.dimm_channel0_disabled = make_channel_disabled_mask(&pei_data, 0);
+ pei_data.dimm_channel1_disabled = make_channel_disabled_mask(&pei_data, 1);
+
timestamp_add_now(TS_BEFORE_INITRAM);
report_platform_info();