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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-17 06:47:50 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-21 07:01:23 +0000 |
| commit | 8e23bac97ec66a49f9ddb1a4069e4e68666833fb (patch) | |
| tree | 92d982a32199bc827e59dc7d8da48a96e5d98599 /src/northbridge | |
| parent | 12b121cdb450d96309dd96b2ccc25fc5501d2250 (diff) | |
| download | coreboot-8e23bac97ec66a49f9ddb1a4069e4e68666833fb.tar.xz | |
intel/fsp1_0,baytrail,rangeley: Tidy up use of preprocessor
Remove cases of __PRE_RAM__ and other preprocessor guards.
Change-Id: Id295227df344fb209d7d5fd12e82aa450198bbb8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34928
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge')
| -rw-r--r-- | src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c index 04a696c2c2..43e71f4d3d 100644 --- a/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c +++ b/src/northbridge/intel/fsp_rangeley/fsp/chipset_fsp_util.c @@ -26,12 +26,6 @@ #include <fspbootmode.h> #include "../chip.h" -#ifdef __PRE_RAM__ -#include <southbridge/intel/fsp_rangeley/romstage.h> -#endif - -#ifdef __PRE_RAM__ - /* Copy the default UPD region and settings to a buffer for modification */ static void GetUpdDefaultFromFsp (FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *UpdData) @@ -96,9 +90,9 @@ static void ConfigureDefaultUpdData(UPD_DATA_REGION *UpdData) if (config->MrcRmtCpgcNumBursts) { UpdData->PcdMrcRmtCpgcNumBursts = config->MrcRmtCpgcNumBursts; } -#if CONFIG(ENABLE_FSP_FAST_BOOT) - UpdData->PcdFastboot = UPD_ENABLE; -#endif + if (CONFIG(ENABLE_FSP_FAST_BOOT)) + UpdData->PcdFastboot = UPD_ENABLE; + /* * Loop through all the SOC devices in the devicetree * enabling and disabling them as requested. @@ -164,5 +158,3 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *pFspInitParams, return; } - -#endif /* __PRE_RAM__ */ |