diff options
author | Martin Roth <martinroth@chromium.org> | 2020-10-06 15:29:28 -0600 |
---|---|---|
committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-10-08 01:18:13 +0000 |
commit | 4b34193d59b506132c0b7404fc0183680c7ae39b (patch) | |
tree | b2d8a7c13c253587075c25fc8ff772043a1b55be /src/soc/amd | |
parent | fc33235f82a08e9ec9a0fcff0f7cba8eda1ac251 (diff) | |
download | coreboot-4b34193d59b506132c0b7404fc0183680c7ae39b.tar.xz |
soc/amd/picasso: Refactor transfer buffer check
The transfer buffer check had gotten large enough to deserve a function
of its own, so break it out.
BUG=None
TEST=Build
Branch=Zork
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: Idf46f8edb6b70c63f623522e2bcd2f22d6d4790b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46112
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/picasso/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/amd/picasso/bootblock/bootblock.c | 27 | ||||
-rw-r--r-- | src/soc/amd/picasso/bootblock/vboot_bootblock.c | 32 | ||||
-rw-r--r-- | src/soc/amd/picasso/include/soc/psp_transfer.h | 4 |
4 files changed, 39 insertions, 25 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index 9c5d4d08c1..1ed1529512 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -24,6 +24,7 @@ bootblock-y += smi_util.c bootblock-y += config.c bootblock-y += pmutil.c bootblock-y += reset.c +bootblock-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += bootblock/vboot_bootblock.c romstage-y += i2c.c romstage-y += romstage.c diff --git a/src/soc/amd/picasso/bootblock/bootblock.c b/src/soc/amd/picasso/bootblock/bootblock.c index a450544b0d..dfd5364a0a 100644 --- a/src/soc/amd/picasso/bootblock/bootblock.c +++ b/src/soc/amd/picasso/bootblock/bootblock.c @@ -16,14 +16,8 @@ #include <soc/i2c.h> #include <amdblocks/amd_pci_mmconf.h> #include <acpi/acpi.h> -#include <security/vboot/symbols.h> #include <security/vboot/vbnv.h> -/* vboot includes directory may not be in include path if vboot is not enabled */ -#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) -#include <2struct.h> -#endif - asmlinkage void bootblock_resume_entry(void); /* PSP performs the memory training and setting up DRAM map prior to x86 cores @@ -133,26 +127,9 @@ void bootblock_soc_init(void) u32 val = cpuid_eax(1); printk(BIOS_DEBUG, "Family_Model: %08x\n", val); -#if CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) - if (*(uint32_t *)_vboot2_work != VB2_SHARED_DATA_MAGIC) { - /* - * If the system has already been rebooted once, but still returns here, - * instead of rebooting to verstage again, assume that the system is in - * a reboot loop, so halt instead. - */ - if ((!vbnv_cmos_failed()) && cmos_read(CMOS_RECOVERY_BYTE) == - CMOS_RECOVERY_MAGIC_VAL) - die("Error: Reboot into recovery was unsuccessful. Halting."); - - printk(BIOS_ERR, "ERROR: VBOOT workbuf not valid.\n"); - printk(BIOS_DEBUG, "Signature: %#08x\n", *(uint32_t *)_vboot2_work); - cmos_init(0); - cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE); - warm_reset(); - } else { - cmos_write(0x00, CMOS_RECOVERY_BYTE); + if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) { + verify_psp_transfer_buf(); } -#endif fch_early_init(); } diff --git a/src/soc/amd/picasso/bootblock/vboot_bootblock.c b/src/soc/amd/picasso/bootblock/vboot_bootblock.c new file mode 100644 index 0000000000..4c3ae4a317 --- /dev/null +++ b/src/soc/amd/picasso/bootblock/vboot_bootblock.c @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/reset.h> +#include <console/console.h> +#include <pc80/mc146818rtc.h> +#include <security/vboot/vbnv.h> +#include <security/vboot/symbols.h> +#include <soc/psp_transfer.h> +#include <2struct.h> + +void verify_psp_transfer_buf(void) +{ + if (*(uint32_t *)_vboot2_work == VB2_SHARED_DATA_MAGIC) { + cmos_write(0x00, CMOS_RECOVERY_BYTE); + return; + } + + /* + * If CMOS is valid and the system has already been rebooted once, but + * still returns here, instead of rebooting to verstage again, assume + * that the system is in a reboot loop and halt. + */ + if ((!vbnv_cmos_failed()) && cmos_read(CMOS_RECOVERY_BYTE) == + CMOS_RECOVERY_MAGIC_VAL) + die("Error: Reboot into recovery was unsuccessful. Halting."); + + printk(BIOS_ERR, "ERROR: VBOOT workbuf not valid.\n"); + printk(BIOS_DEBUG, "Signature: %#08x\n", *(uint32_t *)_vboot2_work); + cmos_init(0); + cmos_write(CMOS_RECOVERY_MAGIC_VAL, CMOS_RECOVERY_BYTE); + warm_reset(); +} diff --git a/src/soc/amd/picasso/include/soc/psp_transfer.h b/src/soc/amd/picasso/include/soc/psp_transfer.h index be88ce876d..fdd7bd1fd9 100644 --- a/src/soc/amd/picasso/include/soc/psp_transfer.h +++ b/src/soc/amd/picasso/include/soc/psp_transfer.h @@ -41,6 +41,10 @@ struct transfer_info_struct { _Static_assert(sizeof(struct transfer_info_struct) == TRANSFER_INFO_SIZE, \ "TRANSFER_INFO_SIZE is incorrect"); + +/* Make sure the PSP transferred information over to x86 side. */ +void verify_psp_transfer_buf(void); + #endif #endif /* PSP_VERSTAGE_PSP_TRANSFER_H */ |