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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2020-12-21 08:48:41 -0700 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2020-12-22 17:06:12 +0000 |
| commit | af55b3f927d097fab9b3736ed7fc059b6802feae (patch) | |
| tree | 6a14bf59f76aa8908141c436616967577450d216 /src/soc/amd | |
| parent | cff6ad8c51d9b7eca385ac5bdee528d845b0be13 (diff) | |
| download | coreboot-af55b3f927d097fab9b3736ed7fc059b6802feae.tar.xz | |
soc/amd/stoneyridge: Remove unused psp.h
psp.h was first included when Stoney Ridge began loading the first
SMU firmware. That step was later moved from bootblock to romstage.
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Change-Id: Id646390ce377143d09455f797de1b149dbb615b5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48797
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/stoneyridge/bootblock.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/bootblock.c b/src/soc/amd/stoneyridge/bootblock.c index 4025f80c96..330b371274 100644 --- a/src/soc/amd/stoneyridge/bootblock.c +++ b/src/soc/amd/stoneyridge/bootblock.c @@ -15,7 +15,6 @@ #include <soc/pci_devs.h> #include <soc/cpu.h> #include <soc/southbridge.h> -#include <amdblocks/psp.h> #include <timestamp.h> #include <halt.h> |