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authorSubrata Banik <subrata.banik@intel.com>2017-03-14 18:26:27 +0530
committerMartin Roth <martinroth@google.com>2017-03-28 18:29:43 +0200
commit7952e283fb6dac19a10112199814c80619a28366 (patch)
tree0b7ffb6932759a02bf5016e0999290c7eb11d2e4 /src/soc/intel/apollolake/include
parent93ebe499d45679a250de780d8a8b73d32d7ea00e (diff)
downloadcoreboot-7952e283fb6dac19a10112199814c80619a28366.tar.xz
soc/intel/apollolake: Clean up code by using common System Agent module
This patch currently contains the SA initialization required for bootblock phase - 1. Use SOC_INTEL_COMMON_BLOCK_SA kconfig for common SA code. 2. Perform PCIEXBAR programming based on soc configurable PCIEX_LENGTH_xxxMB 3. Use common systemagent header file. Change-Id: I01a24e2d4f1c8c9ca113c128bb6b3eac23dc79ad Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/18567 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/include')
-rw-r--r--src/soc/intel/apollolake/include/soc/systemagent.h (renamed from src/soc/intel/apollolake/include/soc/northbridge.h)16
1 files changed, 4 insertions, 12 deletions
diff --git a/src/soc/intel/apollolake/include/soc/northbridge.h b/src/soc/intel/apollolake/include/soc/systemagent.h
index 04e369e7e8..9944c15197 100644
--- a/src/soc/intel/apollolake/include/soc/northbridge.h
+++ b/src/soc/intel/apollolake/include/soc/systemagent.h
@@ -15,18 +15,10 @@
* GNU General Public License for more details.
*/
-#ifndef _SOC_APOLLOLAKE_NORTHBRIDGE_H_
-#define _SOC_APOLLOLAKE_NORTHBRIDGE_H_
+#ifndef SOC_APOLLOLAKE_SYSTEMAGENT_H
+#define SOC_APOLLOLAKE_SYSTEMAGENT_H
-#define MCHBAR 0x48
-#define PCIEXBAR 0x60
-#define PCIEX_SIZE (256 * MiB)
-
-#define BDSM 0xb0 /* Base Data Stolen Memory */
-#define BGSM 0xb4 /* Base GTT Stolen Memory */
-#define TSEG 0xb8 /* TSEG base */
-#define TOLUD 0xbc /* Top of Low Used Memory */
-#define TOUUD 0xa8 /* Top of Upper Usable DRAM */
+#include <intelblocks/systemagent.h>
/* IMR registers are found under MCHBAR. */
#define MCHBAR_IMR0BASE 0x6870
@@ -37,4 +29,4 @@
/* RAPL Package Power Limit register under MCHBAR. */
#define MCHBAR_RAPL_PPL 0x70A8
-#endif /* _SOC_APOLLOLAKE_NORTHBRIDGE_H_ */
+#endif /* SOC_APOLLOLAKE_SYSTEMAGENT_H */