diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2018-10-27 16:40:25 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-03-29 20:00:20 +0000 |
| commit | eb789f0b79aa99e214ccefc04f9f78b550f52f32 (patch) | |
| tree | 59f72703d67577e4aaf76e276ddd442b583cbc14 /src/soc/intel/braswell | |
| parent | 28fa33ccbce042d09daf64efa2097b67570ad4af (diff) | |
| download | coreboot-eb789f0b79aa99e214ccefc04f9f78b550f52f32.tar.xz | |
src: Use include <reset.h> when appropriate
Change-Id: I3b852cae4ef84d257bf1e5486447583bdd16b441
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/29301
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/romstage/romstage.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/romstage/romstage.c b/src/soc/intel/braswell/romstage/romstage.c index ca1eb40236..ae2eac8e20 100644 --- a/src/soc/intel/braswell/romstage/romstage.c +++ b/src/soc/intel/braswell/romstage/romstage.c @@ -31,7 +31,6 @@ #include <mrc_cache.h> #include <string.h> #include <timestamp.h> -#include <reset.h> #include <vendorcode/google/chromeos/chromeos.h> #include <fsp/util.h> #include <soc/gpio.h> |