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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-08-02 06:13:22 +0300 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2019-08-03 17:34:40 +0000 |
commit | 26a682c9441b4f7312ff9f69d22029841aa245bd (patch) | |
tree | 1543a1ae418702e3258f35ab435ea9ad79583ebf /src/soc/intel/broadwell/memmap.c | |
parent | 825646e6431b51bd45349dbd2cb1d607e2eecae1 (diff) | |
download | coreboot-26a682c9441b4f7312ff9f69d22029841aa245bd.tar.xz |
intel/baytrail,broadwell: Move stage cache support function
Let garbage-collection take care of stage_cache_external_region()
when it is not needed and move implementation to a suitable file
already building for needed stages.
Change-Id: Ia6adcc0c8bf6d4abc095ac669aaae876b33ed0f3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34669
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/broadwell/memmap.c')
-rw-r--r-- | src/soc/intel/broadwell/memmap.c | 17 |
1 files changed, 16 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/memmap.c b/src/soc/intel/broadwell/memmap.c index 836fda8b5d..7c53fa6468 100644 --- a/src/soc/intel/broadwell/memmap.c +++ b/src/soc/intel/broadwell/memmap.c @@ -15,11 +15,14 @@ #define __SIMPLE_DEVICE__ -#include <device/pci_ops.h> #include <cbmem.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <soc/pci_devs.h> #include <soc/systemagent.h> +#include <soc/smm.h> +#include <stage_cache.h> +#include <stdint.h> static uintptr_t dpr_region_start(void) { @@ -42,3 +45,15 @@ void *cbmem_top(void) { return (void *) dpr_region_start(); } + +void stage_cache_external_region(void **base, size_t *size) +{ + /* The ramstage cache lives in the TSEG region. + * The top of RAM is defined to be the TSEG base address. */ + u32 offset = smm_region_size(); + offset -= CONFIG_IED_REGION_SIZE; + offset -= CONFIG_SMM_RESERVED_SIZE; + + *base = (void *)(cbmem_top() + offset); + *size = CONFIG_SMM_RESERVED_SIZE; +} |