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| author | John Zhao <john.zhao@intel.com> | 2019-03-15 16:54:27 -0700 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-04-18 10:15:55 +0000 |
| commit | db3f0e3ebd8364d3cd46130743f38ff8425299f8 (patch) | |
| tree | a8c538b6980ede915d85226fb1fdf980d814ad88 /src/soc/intel/cannonlake/systemagent.c | |
| parent | 45d4b17f5e05cd493f19e69900a38ac805eb63b5 (diff) | |
| download | coreboot-db3f0e3ebd8364d3cd46130743f38ff8425299f8.tar.xz | |
soc/intel/cnl: Generate DMAR ACPI table
The platform supports Virtualization Technology for Directed I/O.
Generate DMAR acpi table if VT-d feature is enabled.
BUG=b:130351429
TEST=Booted to kernel and verified the DMAR table contents.
Change-Id: I4e1ee5244c67affb13947436d81628c5dc665c9e
Signed-off-by: John Zhao <john.zhao@intel.com>
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31917
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake/systemagent.c')
| -rw-r--r-- | src/soc/intel/cannonlake/systemagent.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/systemagent.c b/src/soc/intel/cannonlake/systemagent.c index 9c8d761648..d850b15b34 100644 --- a/src/soc/intel/cannonlake/systemagent.c +++ b/src/soc/intel/cannonlake/systemagent.c @@ -18,10 +18,12 @@ #include <device/device.h> #include <delay.h> #include <device/pci.h> +#include <device/pci_ops.h> #include <intelblocks/systemagent.h> #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/systemagent.h> +#include "chip.h" /* * SoC implementation @@ -31,6 +33,8 @@ */ void soc_add_fixed_mmio_resources(struct device *dev, int *index) { + const struct soc_intel_cannonlake_config *const config = dev->chip_info; + static const struct sa_mmio_descriptor soc_fixed_resources[] = { { PCIEXBAR, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_SA_PCIEX_LENGTH, "PCIEXBAR" }, @@ -54,6 +58,15 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index) sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources, ARRAY_SIZE(soc_fixed_resources)); + + /* Add Vt-d resources if VT-d is enabled. */ + if ((pci_read_config32(dev, CAPID0_A) & VTD_DISABLE)) + return; + + if (!(config && config->VtdDisable)) { + sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources, + ARRAY_SIZE(soc_vtd_resources)); + } } /* |