summaryrefslogtreecommitdiff
path: root/src/soc/intel/common/Kconfig
diff options
context:
space:
mode:
authorLee Leahy <leroy.p.leahy@intel.com>2015-06-24 11:17:54 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2015-06-26 00:01:57 +0200
commit3e5bc1feabd58f1d6f37f8b50156778caa00bfea (patch)
treec2494a6bd2444822ce8950e6a35b965f80fe0c75 /src/soc/intel/common/Kconfig
parentfbe276b96ff874365c6542b3e24cd069e5342df4 (diff)
downloadcoreboot-3e5bc1feabd58f1d6f37f8b50156778caa00bfea.tar.xz
soc/intel/common: Restrict common romstage/ramstage code to FSP
Restrict the use of the common romstage/ramstage code to FSP 1.1 BRANCH=none BUG=None TEST=Build and run on cyan/sklrvp Change-Id: Ifbdb6b4c201560a97617e83d69bf9974f9411994 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: http://review.coreboot.org/10653 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/common/Kconfig')
-rw-r--r--src/soc/intel/common/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 75e585d70a..3d0c0eff78 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -73,18 +73,22 @@ config SOC_INTEL_COMMON_FSP_RAM_INIT
config SOC_INTEL_COMMON_FSP_ROMSTAGE
bool
default n
+ depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_RESET
bool
default n
+ depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_STACK
bool
default n
+ depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_STAGE_CACHE
bool
default n
+ depends on PLATFORM_USES_FSP1_1
config ROMSTAGE_RAM_STACK_SIZE
hex "Size of the romstage RAM stack in bytes"