diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-11 17:34:54 +0200 |
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committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-10-21 12:34:28 +0000 |
commit | 63032439f4278125b3a01d33d056761dd1ae8cba (patch) | |
tree | 58621ab2e80ad1f0bc75fc76c4740cdf46d1804c /src/soc/intel/common/block/include | |
parent | 2ac743330c2668abae9eb1d5a01ad1b86ba918a9 (diff) | |
download | coreboot-63032439f4278125b3a01d33d056761dd1ae8cba.tar.xz |
{cpu,soc}/intel: replace AES-NI locking by common implemenation call
Deduplicate code by using the new common cpu code implementation of
AES-NI locking.
Change-Id: I7ab2d3839ecb758335ef8cc6a0c0c7103db0fa50
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46278
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/msr.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 2ef4561341..2e12bf071d 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -24,9 +24,6 @@ #define EMULATE_DELAY_OFFSET_VALUE 20 #define EMULATE_PM_TMR_EN (1 << 16) #define EMULATE_DELAY_VALUE 0x13 -#define MSR_FEATURE_CONFIG 0x13c -#define FEATURE_CONFIG_RESERVED_MASK 0x3ULL -#define FEATURE_CONFIG_LOCK (1 << 0) #define SMM_MCA_CAP_MSR 0x17d #define SMM_CPU_SVRSTR_BIT 57 #define SMM_CPU_SVRSTR_MASK (1 << (SMM_CPU_SVRSTR_BIT - 32)) |