diff options
author | Aaron Durbin <adurbin@chromium.org> | 2015-07-30 16:52:56 -0500 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2015-08-13 16:33:53 +0200 |
commit | e33a1724b34d839fae16836a5bdde4d53a788c15 (patch) | |
tree | c2633a17ff75eb31546a73c8e5fee689f8704dc7 /src/soc/intel/skylake/uart_debug.c | |
parent | 14bb36c5ca08a646dd376d81199a6f22aa66b3d4 (diff) | |
download | coreboot-e33a1724b34d839fae16836a5bdde4d53a788c15.tar.xz |
skylake: fix serial port with new code base
Many Kconfig options changed in coreboot.org since
skylake was first started. Fix Kconfig option name
changes, and also provide a common option, UART_DEBUG
that can be selected to select all the necessary
options.
Note: It's still a requirement to manually unset the
8250IO option because that's unconditionally set.
BUG=chrome-os-partner:43419
BUG=chrome-os-partner:43463
BRANCH=None
TEST=Built glados. Booted into kernel. Kernel reboots somewhere.
Original-Change-Id: I9e6549ea0f1d6b9ffe64a73856ec87b5bc7b7091
Original-Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/289951
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Change-Id: I0e6b492d7279cc35d4fb3ac17fd727177adce39d
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11172
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc/intel/skylake/uart_debug.c')
-rw-r--r-- | src/soc/intel/skylake/uart_debug.c | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/uart_debug.c b/src/soc/intel/skylake/uart_debug.c new file mode 100644 index 0000000000..03285077b9 --- /dev/null +++ b/src/soc/intel/skylake/uart_debug.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <stddef.h> +#include <console/uart.h> +#include <soc/iomap.h> +#include <soc/serialio.h> + +unsigned int uart_platform_refclk(void) +{ + /* + * Set M and N divisor inputs and enable clock. + * Main reference frequency to UART is: + * 120MHz * M / N = 120MHz * 48 / 3125 = 1843200Hz + * The different order below is to handle integer math overflow. + */ + return 120 * MHz / SIO_REG_PPR_CLOCK_N_DIV * SIO_REG_PPR_CLOCK_M_DIV; +} + +uintptr_t uart_platform_base(int idx) +{ + /* Same base address for all debug port usage. In reality UART2 + * is currently only supported. */ + return UART_DEBUG_BASE_ADDRESS; +} |