diff options
| author | Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com> | 2020-05-15 15:55:37 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-05-20 09:14:11 +0000 |
| commit | d2132469ae86d7287576a2ba3211cdbfeb572703 (patch) | |
| tree | 2f9ccb52774aba1a0e0f9a2d85b59d52a5d1d9c0 /src/soc/intel/tigerlake/systemagent.c | |
| parent | 425d8640fa3d8e4a43bd9f2cc8f8fd7fedf675c3 (diff) | |
| download | coreboot-d2132469ae86d7287576a2ba3211cdbfeb572703.tar.xz | |
tigerlake: update processor power limits configuration
Update processor power limit configuration parameters based on
common code base support for Intel Tigerlake SoC based platforms.
BRANCH=None
BUG=None
TEST=Built and tested on volteer system
Change-Id: Iccd387d78bb45ca3de73f531a901d1d3f793d7bd
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39345
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/tigerlake/systemagent.c')
| -rw-r--r-- | src/soc/intel/tigerlake/systemagent.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/systemagent.c b/src/soc/intel/tigerlake/systemagent.c index 4cdca50410..977c6674e7 100644 --- a/src/soc/intel/tigerlake/systemagent.c +++ b/src/soc/intel/tigerlake/systemagent.c @@ -7,10 +7,13 @@ */ #include <device/device.h> +#include <delay.h> #include <device/pci.h> #include <device/pci_ops.h> +#include <intelblocks/power_limit.h> #include <intelblocks/systemagent.h> #include <soc/iomap.h> +#include <soc/soc_chip.h> #include <soc/systemagent.h> /* @@ -60,9 +63,18 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index) */ void soc_systemagent_init(struct device *dev) { + struct soc_power_limits_config *soc_config; + config_t *config; + /* Enable Power Aware Interrupt Routing */ enable_power_aware_intr(); /* Enable BIOS Reset CPL */ enable_bios_reset_cpl(); + + /* Configure turbo power limits 1ms after reset complete bit */ + mdelay(1); + config = config_of_soc(); + soc_config = &config->power_limits_config; + set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config); } |