sdm845: Add clock support

This sets up initial clock configuration for QUP and QSPI,
and includes configuration of Root Clock Generators(RCG) and
clock branches enablement.

TEST=build & run

Change-Id: I0b1d7f6daa179c0b24a97d42b66c1a9ee596b0a3
Signed-off-by: David Dai <daidavid1@codeaurora.org>
Reviewed-on: https://review.coreboot.org/c/25454
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>

1 files changed, 5 insertions, 1 deletions

diff --git a/src/soc/qualcomm/sdm845/Makefile.inc b/src/soc/qualcomm/sdm845/Makefile.inc
index 507d91397f..fc8edd56e3 100644
--- a/src/soc/qualcomm/sdm845/Makefile.inc
+++ b/src/soc/qualcomm/sdm845/Makefile.inc
@@ -7,18 +7,21 @@ bootblock-y += spi.c
 bootblock-y += mmu.c
 bootblock-y += timer.c
 bootblock-y += gpio.c
-bootblock-y += uart_bitbang.c
+bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c
+bootblock-y += clock.c
 
 ################################################################################
 verstage-y += spi.c
 verstage-y += timer.c
 verstage-y += gpio.c
+verstage-y += clock.c
 
 ################################################################################
 romstage-y += spi.c
 romstage-y += cbmem.c
 romstage-y += timer.c
 romstage-y += gpio.c
+romstage-y += clock.c
 
 ################################################################################
 ramstage-y += soc.c
@@ -26,6 +29,7 @@ ramstage-y += spi.c
 ramstage-y += cbmem.c
 ramstage-y += timer.c
 ramstage-y += gpio.c
+ramstage-y += clock.c
 
 ################################################################################