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| author | Julien Viard de Galbert <jviarddegalbert@online.net> | 2018-03-07 14:19:03 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-20 00:42:46 +0000 |
| commit | 69c57e19da3d940b34e8dd3e5ca7eb32e79e391e (patch) | |
| tree | df67d9325d9ddb64e7192004758418f97cb20081 /src/soc | |
| parent | 1c33f740c444c27e61e025a74ed99955f2ea0288 (diff) | |
| download | coreboot-69c57e19da3d940b34e8dd3e5ca7eb32e79e391e.tar.xz | |
soc/intel/denverton_ns: Enable MC Exception
Change-Id: I9773c61d06bb6c68612e498a35b5ad22cd5a8a6e
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/25434
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/denverton_ns/cpu.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c index 7cee5be39d..1fd233a23a 100644 --- a/src/soc/intel/denverton_ns/cpu.c +++ b/src/soc/intel/denverton_ns/cpu.c @@ -2,6 +2,7 @@ #include <console/console.h> #include <cpu/cpu.h> +#include <cpu/x86/cr.h> #include <cpu/x86/mp.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> @@ -44,6 +45,12 @@ static void dnv_configure_mca(void) of these banks are core vs package scope. For now every CPU clears every bank. */ mca_configure(); + + /* TODO install a fallback MC handler for each core in case OS does + not provide one. Is it really needed? */ + + /* Enable the machine check exception */ + write_cr4(read_cr4() | CR4_MCE); } static void denverton_core_init(struct device *cpu) |