diff options
| author | Jimmy Zhang <jimmzhang@nvidia.com> | 2014-11-03 11:41:02 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-10 12:01:18 +0200 |
| commit | 1f4db4046f911b2ed586509de5d8e109b46a9485 (patch) | |
| tree | 2c0dde97fb8fa5b6c33a57cd4ef9e946b5ffee37 /src/soc | |
| parent | ae272297aaeb3e383eb1cd67f104e563a06d957a (diff) | |
| download | coreboot-1f4db4046f911b2ed586509de5d8e109b46a9485.tar.xz | |
ryu: Add display_start api
Enable display only developer and recovery mode.
Will add in the actual display supporting functions in coming
patches.
BRANCH=none
BUG=chrome-os-partner:31936
TEST=build and test on ryu
Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
Change-Id: I0d312fd132dc310813432f4d8a28ad16c9bb36aa
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: dd1bd56e83532c77d675f72b301b413cbcf3f489
Original-Change-Id: Idfa24d23c81baaedb944d2b9835255edad4e422b
Original-Reviewed-on: https://chromium-review.googlesource.com/226904
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Original-Tested-by: Jimmy Zhang <jimmzhang@nvidia.com>
Reviewed-on: http://review.coreboot.org/9421
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/nvidia/tegra132/soc.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c index 1072467818..0014f84b54 100644 --- a/src/soc/nvidia/tegra132/soc.c +++ b/src/soc/nvidia/tegra132/soc.c @@ -25,6 +25,7 @@ #include <cbmem.h> #include <console/console.h> #include <device/device.h> +#include <soc/nvidia/tegra/dc.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/cpu.h> @@ -75,6 +76,11 @@ static struct cpu_control_ops cntrl_ops = { .start_cpu = cntrl_start_cpu, }; +void display_startup(device_t dev) +{ + printk(BIOS_INFO, "Entering %s()\n", __func__); +} + static void soc_init(device_t dev) { struct soc_nvidia_tegra132_config *cfg; @@ -84,6 +90,11 @@ static void soc_init(device_t dev) cfg = dev->chip_info; spintable_init((void *)cfg->spintable_addr); arch_initialize_cpus(dev, &cntrl_ops); + + if (vboot_skip_display_init()) + printk(BIOS_INFO, "Skipping display init.\n"); + else + display_startup(dev); } static struct device_operations soc_ops = { |