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| author | Paul Menzel <pmenzel@molgen.mpg.de> | 2020-07-25 10:49:44 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-12-02 10:43:50 +0000 |
| commit | 270a32370d92bc283ad17a58ccc1c1f0398a6915 (patch) | |
| tree | 870e018bdfd02283311a5df2e88fe7e93b20352a /src/soc | |
| parent | 1f45104d1abf110918a2146c1a28d920aef21de8 (diff) | |
| download | coreboot-270a32370d92bc283ad17a58ccc1c1f0398a6915.tar.xz | |
soc/intel/skylake: Map VBIOS IDs
The extracted VBIOS Option ROM ships the same ID for several
generations, not matching the ID on the hardware resulting in a
mismatch, and coreboot does not run the Option ROM.
PCI ROM image, vendor ID 8086, device ID 0406,
ID mismatch: vendor ID 8086, device ID 5916
Add the appropriate mappings.
TEST=coreboot runs the ROM on the TUXEDO Book BU1406.
Change-Id: Ia167d91627a7ff1b329ea75f150b3ce95c0acccb
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43853
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/graphics.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/graphics.c b/src/soc/intel/skylake/graphics.c index 4ecf67a98d..f95ca6c08c 100644 --- a/src/soc/intel/skylake/graphics.c +++ b/src/soc/intel/skylake/graphics.c @@ -3,11 +3,13 @@ #include <commonlib/helpers.h> #include <console/console.h> #include <device/mmio.h> +#include <device/pci_rom.h> #include <device/resource.h> #include <drivers/intel/gma/i915.h> #include <drivers/intel/gma/i915_reg.h> #include <intelblocks/graphics.h> #include <soc/ramstage.h> +#include <soc/systemagent.h> #include <types.h> void graphics_soc_init(struct device *dev) @@ -76,3 +78,21 @@ intel_igd_get_controller_info(const struct device *device) struct soc_intel_skylake_config *chip = device->chip_info; return &chip->gfx; } + +/* + * Some VGA option roms are used for several chipsets but they only have one PCI ID in their + * header. If we encounter such an option rom, we need to do the mapping ourselves. + */ +u32 map_oprom_vendev(u32 vendev) +{ + u32 new_vendev = vendev; + + switch (vendev) { + case 0x80865916: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTM */ + case 0x80865917: /* PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR */ + new_vendev = SA_IGD_OPROM_VENDEV; + break; + } + + return new_vendev; +} |