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authorAaron Durbin <adurbin@chromium.org>2015-09-17 16:09:30 -0500
committerPatrick Georgi <pgeorgi@google.com>2015-10-07 10:46:11 +0000
commit37a5d15da92a9fb8a682a32ef1eaf37734fcc5ad (patch)
tree8f37c1712f44789501a830fdaaaf22012972738c /src/soc
parent72bb66eb9cecf94b66a4aca3586165d5495fcfdb (diff)
downloadcoreboot-37a5d15da92a9fb8a682a32ef1eaf37734fcc5ad.tar.xz
cbfs: add struct cbfsf
Now that cbfs is adding more metadata in the cbfs file header one needs to access that metadata. Therefore, add struct cbfsf which tracks the metadata and data of the file separately. Note that stage and payload metadata specific to itself is still contained within the 'data' portion of a cbfs file. Update the cbfs API to use struct cbfsf. Additionally, remove struct cbfsd as there's nothing else associated with a cbfs region aside from offset and size which tracked by a region_device (thanks, CBFS_ALIGNMENT!). BUG=None BRANCH=None TEST=Built and booted through end of ramstage on qemu armv7. Built and booted glados using Chrome OS. Change-Id: I05486c6cf6cfcafa5c64b36324833b2374f763c2 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11679 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/common/fsp_ramstage.c6
-rw-r--r--src/soc/nvidia/tegra132/ccplex.c5
-rw-r--r--src/soc/nvidia/tegra210/mtc.c5
3 files changed, 11 insertions, 5 deletions
diff --git a/src/soc/intel/common/fsp_ramstage.c b/src/soc/intel/common/fsp_ramstage.c
index d1f2e49aff..c8dfad1f83 100644
--- a/src/soc/intel/common/fsp_ramstage.c
+++ b/src/soc/intel/common/fsp_ramstage.c
@@ -164,15 +164,15 @@ static void fsp_cache_save(struct prog *fsp)
static int fsp_find_and_relocate(struct prog *fsp)
{
- struct region_device fsp_rdev;
+ struct cbfsf fsp_file;
uint32_t type = CBFS_TYPE_FSP;
- if (cbfs_boot_locate(&fsp_rdev, prog_name(fsp), &type)) {
+ if (cbfs_boot_locate(&fsp_file, prog_name(fsp), &type)) {
printk(BIOS_ERR, "ERROR: Couldn't find fsp.bin in CBFS.\n");
return -1;
}
- if (fsp_relocate(fsp, &fsp_rdev)) {
+ if (fsp_relocate(fsp, &fsp_file.data)) {
printk(BIOS_ERR, "ERROR: FSP relocation failed.\n");
return -1;
}
diff --git a/src/soc/nvidia/tegra132/ccplex.c b/src/soc/nvidia/tegra132/ccplex.c
index e133b48482..b003ec1080 100644
--- a/src/soc/nvidia/tegra132/ccplex.c
+++ b/src/soc/nvidia/tegra132/ccplex.c
@@ -77,6 +77,7 @@ int ccplex_load_mts(void)
{
ssize_t nread;
struct stopwatch sw;
+ struct cbfsf mts_file;
struct region_device fh;
/*
@@ -87,11 +88,13 @@ int ccplex_load_mts(void)
void * const mts = (void *)(uintptr_t)MTS_LOAD_ADDRESS;
stopwatch_init(&sw);
- if (cbfs_boot_locate(&fh, MTS_FILE_NAME, NULL)) {
+ if (cbfs_boot_locate(&mts_file, MTS_FILE_NAME, NULL)) {
printk(BIOS_DEBUG, "MTS file not found: %s\n", MTS_FILE_NAME);
return -1;
}
+ cbfs_file_data(&fh, &mts_file);
+
/* Read MTS file into the carveout region. */
nread = rdev_readat(&fh, mts, 0, region_device_sz(&fh));
diff --git a/src/soc/nvidia/tegra210/mtc.c b/src/soc/nvidia/tegra210/mtc.c
index fb6c9cbdd7..b402a14cd3 100644
--- a/src/soc/nvidia/tegra210/mtc.c
+++ b/src/soc/nvidia/tegra210/mtc.c
@@ -33,16 +33,19 @@ int tegra210_run_mtc(void)
{
ssize_t nread;
struct region_device fh;
+ struct cbfsf mtc_file;
void * const mtc = (void *)(uintptr_t)CONFIG_MTC_ADDRESS;
void *dvfs_table;
size_t (*mtc_fw)(void **dvfs_table) = (void *)mtc;
- if (cbfs_boot_locate(&fh, "tegra_mtc.bin", NULL)) {
+ if (cbfs_boot_locate(&mtc_file, "tegra_mtc.bin", NULL)) {
printk(BIOS_ERR, "MTC file not found: tegra_mtc.bin\n");
return -1;
}
+ cbfs_file_data(&fh, &mtc_file);
+
/* Read MTC file into predefined region. */
nread = rdev_readat(&fh, mtc, 0, region_device_sz(&fh));