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authorJohnny Lin <johnny_lin@wiwynn.com>2020-03-27 22:06:30 +0800
committerPatrick Georgi <pgeorgi@google.com>2020-05-01 06:09:19 +0000
commit3b9d995ecb99063adc2c79bb3c2e73de72499e01 (patch)
tree4f287743c1e9d35562231e6214c00861ed907ca5 /src/soc
parent5fcfbe14818e4a4cb1111c759e183195607e0a91 (diff)
downloadcoreboot-3b9d995ecb99063adc2c79bb3c2e73de72499e01.tar.xz
mb/ocp/tiogapass: Update UPD IIO bifurcation at run-time
Update UPD IIO bifurcation at run-time according to different Riser cards. For detail please reference Facebook Server Intel Motherboard v4.0, Sec. 10.1.2 Riser card types. With the engineering build FSP, it can only configure IIO for one socket so my local test needs to remove all socket1 elements from tp_iio_bifur_table. This change relies on [1] and need to add GPP_C15 and GPP_C16 to early_gpio_table for gpio configuration in bootblock. [1] https://review.coreboot.org/c/coreboot/+/39427/ Tested=OCP Tioga Pass can see socket0 IIO being updated with an engineering build FSP. Change-Id: I8e63a233a2235cd45b14b20542e6efab3de17899 Signed-off-by: Johnny Lin <johnny_lin@wiwynn.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39895 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
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