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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-03-13 02:38:23 +0100 |
|---|---|---|
| committer | Marshall Dawson <marshalldawson3rd@gmail.com> | 2021-03-14 15:08:09 +0000 |
| commit | 4cd9ac0a55bdd010d6aeed841f51c480d1437724 (patch) | |
| tree | fcf785f0e6e6147c568e82a702841c85a0ed4799 /src/soc | |
| parent | 108a4763f008391945014004f49d79a9fa21b5f7 (diff) | |
| download | coreboot-4cd9ac0a55bdd010d6aeed841f51c480d1437724.tar.xz | |
soc/amd/picasso/mca: don't do out of bounds array accesses
The Picasso APUs advertise 23 MCA banks in the lower byte of the
IA32_MCG_CAP MSR, which is more than the 7 core MCA banks.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3e1c8ed437820b350c78b0517e6521582002ee1e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51477
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/picasso/mca.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c index 5471a6bfc7..8ea5276450 100644 --- a/src/soc/amd/picasso/mca.c +++ b/src/soc/amd/picasso/mca.c @@ -162,7 +162,8 @@ void check_mca(void) int core = cpuid_ebx(1) >> 24; printk(BIOS_WARNING, "#MC Error: core %d, bank %d %s\n", - core, i, mca_bank_name[i]); + core, i, + i < ARRAY_SIZE(mca_bank_name) ? mca_bank_name[i] : ""); printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n", i, mci.sts.hi, mci.sts.lo); |