diff options
| author | Vaibhav Shankar <vaibhav.shankar@intel.com> | 2017-10-11 16:31:47 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-10-12 18:26:33 +0000 |
| commit | 4df1c4cedb51a0e7b249f1af239be30600e9199e (patch) | |
| tree | 7461d6e9647f5277e1ed4f47653571070d37bd57 /src/soc | |
| parent | 63300f72920d8ffb2c33669f53b454c794452f92 (diff) | |
| download | coreboot-4df1c4cedb51a0e7b249f1af239be30600e9199e.tar.xz | |
soc/intel/cannonlake: Add ACPI platform sleep capability
Add the required ACPI sleep states
Change-Id: I7750062554f087e4f88da56790e4122d5fa20529
Signed-off-by: Vaibhav Shankar <vaibhav.shankar@intel.com>
Reviewed-on: https://review.coreboot.org/21975
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/cannonlake/acpi/sleepstates.asl | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/acpi/sleepstates.asl b/src/soc/intel/cannonlake/acpi/sleepstates.asl new file mode 100644 index 0000000000..d19f080d5d --- /dev/null +++ b/src/soc/intel/cannonlake/acpi/sleepstates.asl @@ -0,0 +1,20 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Intel Corp. + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +Name (\_S0, Package () { 0x0, 0x0, 0x0, 0x0 }) +Name (\_S3, Package () { 0x5, 0x5, 0x0, 0x0 }) +Name (\_S5, Package () { 0x7, 0x7, 0x0, 0x0 }) |