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| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-06-02 12:30:07 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-09 16:29:10 +0200 |
| commit | 6a67ffb6ea0e05d42222b6159802aa5e18b22f8f (patch) | |
| tree | e328adff67f7564914d5bb17d0def95607eb4fd4 /src/soc | |
| parent | 397c7b341123ae832e3bb4c90b1934a0d3069645 (diff) | |
| download | coreboot-6a67ffb6ea0e05d42222b6159802aa5e18b22f8f.tar.xz | |
soc/braswell: fix scope for I2C ACPI devices
For an unknown reason, the I2C ACPI devices were placed
under \SB intead of \SB.PCI0, as with all other non-Atom
based Intel platforms. While Linux is tolerant of this,
Windows is not. Correct by moving I2C ACPI devices where
they belong.
Also, adjust I2C devices at board level for intel/strago
and google/cyan as to not break compilation.
Change-Id: Iaf8211bd86d6261ee8c4d9c4262338f7fe19ef43
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20055
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/braswell/acpi/southcluster.asl | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl index 36250c154b..76176620d8 100644 --- a/src/soc/intel/braswell/acpi/southcluster.asl +++ b/src/soc/intel/braswell/acpi/southcluster.asl @@ -253,7 +253,10 @@ Scope (\_SB) { /* GPIO Devices */ #include "gpio.asl" +} +Scope (\_SB.PCI0) +{ /* LPSS Devices */ #include "lpss.asl" |