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| author | Michael Niewöhner <foss@mniewoehner.de> | 2021-04-06 20:46:09 +0200 |
|---|---|---|
| committer | Michael Niewöhner <foss@mniewoehner.de> | 2021-05-11 13:14:53 +0000 |
| commit | 6d2fbba0ed5436fc06112e6b9bc5386377cc82ff (patch) | |
| tree | 42798bc6a960d6fbb6ab8e1a8cf31ba54bfe20c5 /src/soc | |
| parent | 0e0c2b345e6caa088e43e598dc483cc3624a0668 (diff) | |
| download | coreboot-6d2fbba0ed5436fc06112e6b9bc5386377cc82ff.tar.xz | |
docs: correct and rewrite documentation regarding n/c / unused pads
Intel PDGs starting from Skylake / Sunrise Point state that, different
from the general recommendation in digital electronics, unconnected
GPIOs defaulting to GPIO mode do explicitly not require termination.
The reason for this is, that these GPIOs have the `GPIORXDIS` bit set,
which effectively disconnects the pad from the internal logic by
disabling the input buffer.
This bit - besides `GPIOTXDIS` - can also be set explicitly by using
the gpio macro `PAD_NC(pad, NONE)`.
In some cases, a pull resistor may be required due to bad board design
or when a vendor sets the RX/TX disable bits together with a pull
resistor and schematics are not available to check if the pad is really
unconnected or just unused. In this case the pull resistor should be
kept.
Pads defaulting to native functions usually don't need special handling.
However, when pads requiring external pull-ups are missing these due to
bad board design, they should be configured with `PAD_NC` to disconnect
them internally.
Rewrite the documentation to reflect these new findings.
Also clarify the comment in soc/intel gpio code accordingly.
Change-Id: Id01b197ebe8f2b8bb4ecf3d119ec2298b26d9be0
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52139
Reviewed-by: Tim Crawford <tcrawford@system76.com>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/gpio_defs.h | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h index e5a536d8b3..d3249bcbbb 100644 --- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h +++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h @@ -301,9 +301,10 @@ PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, DRIVER) /* - * No Connect configuration for unused pad. + * No Connect configuration for unconnected or unused pad. * Both TX and RX are disabled. RX disabling is done to avoid unnecessary - * setting of GPI_STS. RX Level/Edge Trig Configuration set to disable + * setting of GPI_STS and to prevent triggering the internal logic by floating + * pads. */ #define PAD_NC(pad, pull) \ _PAD_CFG_STRUCT(pad, \ |