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authorPatrick Rudolph <patrick.rudolph@9elements.com>2020-02-19 12:57:00 +0100
committerHung-Te Lin <hungte@chromium.org>2020-12-17 06:21:56 +0000
commit8b56c8c6b2694500318eba14e291a0586837ebe8 (patch)
tree69e6a5dc28afa8650449a0456e049536fa488165 /src/soc
parent6c04b353c5d9df899f4fb78294a992902e36e2bd (diff)
downloadcoreboot-8b56c8c6b2694500318eba14e291a0586837ebe8.tar.xz
drivers: Replace set_vbe_mode_info_valid
Currently it's not possible to add multiple graphics driver into one coreboot image. This patch series will fix this issue by providing a single API that multiple graphics driver can use. This is required for platforms that have two graphic cards, but different graphic drivers, like Intel+Aspeed on server platforms or Intel+Nvidia on consumer notebooks. The goal is to remove duplicated fill_fb_framebuffer(), the advertisment of multiple indepent framebuffers in coreboot tables, and better runtime/build time graphic configuration options. Replace set_vbe_mode_info_valid with fb_add_framebuffer_info or fb_new_framebuffer_info_from_edid. Change-Id: I95d1d62385a201c68c6c2527c023ad2292a235c5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra124/display.c12
-rw-r--r--src/soc/nvidia/tegra210/dc.c22
-rw-r--r--src/soc/rockchip/rk3288/display.c3
-rw-r--r--src/soc/rockchip/rk3399/display.c3
4 files changed, 16 insertions, 24 deletions
diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c
index 485e032c19..5935d0d169 100644
--- a/src/soc/nvidia/tegra124/display.c
+++ b/src/soc/nvidia/tegra124/display.c
@@ -14,6 +14,7 @@
#include <soc/nvidia/tegra/pwm.h>
#include <stdint.h>
#include <string.h>
+#include <framebuffer_info.h>
#include "chip.h"
@@ -312,10 +313,9 @@ void display_startup(struct device *dev)
/* tell depthcharge ...
*/
- struct edid edid;
- edid.mode.va = config->yres;
- edid.mode.ha = config->xres;
- edid_set_framebuffer_bits_per_pixel(&edid,
- config->framebuffer_bits_per_pixel, 32);
- set_vbe_mode_info_valid(&edid, (uintptr_t)(framebuffer_base_mb*MiB));
+ const uint32_t bytes_per_line = ALIGN_UP(config->xres *
+ DIV_ROUND_UP(config->framebuffer_bits_per_pixel, 8), 32);
+
+ fb_add_framebuffer_info(framebuffer_base_mb*MiB, config->xres, config->yres,
+ bytes_per_line, config->framebuffer_bits_per_pixel);
}
diff --git a/src/soc/nvidia/tegra210/dc.c b/src/soc/nvidia/tegra210/dc.c
index 8625f76a8c..0c54f7a304 100644
--- a/src/soc/nvidia/tegra210/dc.c
+++ b/src/soc/nvidia/tegra210/dc.c
@@ -3,10 +3,10 @@
#include <console/console.h>
#include <device/mmio.h>
#include <stdint.h>
-#include <edid.h>
#include <device/device.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/display.h>
+#include <framebuffer_info.h>
#include "chip.h"
@@ -212,19 +212,9 @@ int tegra_dc_init(struct display_controller *disp_ctrl)
void pass_mode_info_to_payload(
struct soc_nvidia_tegra210_config *config)
{
- struct edid edid;
-
- edid.mode.va = config->display_yres;
- edid.mode.ha = config->display_xres;
- edid_set_framebuffer_bits_per_pixel(&edid,
- config->framebuffer_bits_per_pixel, 64);
-
- printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "
- " x_res x y_res: %d x %d, size: %d\n",
- __func__, edid.bytes_per_line,
- edid.framebuffer_bits_per_pixel,
- edid.x_resolution, edid.y_resolution,
- (edid.bytes_per_line * edid.y_resolution));
-
- set_vbe_mode_info_valid(&edid, 0);
+ const uint32_t bytes_per_line = ALIGN_UP(config->display_xres *
+ DIV_ROUND_UP(config->framebuffer_bits_per_pixel, 8), 64);
+ /* The framebuffer address is zero to let the payload allocate it */
+ fb_add_framebuffer_info(0, config->display_xres, config->display_yres,
+ bytes_per_line, config->framebuffer_bits_per_pixel);
}
diff --git a/src/soc/rockchip/rk3288/display.c b/src/soc/rockchip/rk3288/display.c
index fd86b95d68..19a75de1fd 100644
--- a/src/soc/rockchip/rk3288/display.c
+++ b/src/soc/rockchip/rk3288/display.c
@@ -17,6 +17,7 @@
#include <soc/grf.h>
#include <soc/soc.h>
#include <soc/vop.h>
+#include <framebuffer_info.h>
#include "chip.h"
@@ -124,5 +125,5 @@ void rk_display_init(struct device *dev, u32 lcdbase, unsigned long fb_size)
break;
}
- set_vbe_mode_info_valid(&edid, (uintptr_t)lcdbase);
+ fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)lcdbase);
}
diff --git a/src/soc/rockchip/rk3399/display.c b/src/soc/rockchip/rk3399/display.c
index 70e8c7c15d..1d263ef5dc 100644
--- a/src/soc/rockchip/rk3399/display.c
+++ b/src/soc/rockchip/rk3399/display.c
@@ -18,6 +18,7 @@
#include <soc/mipi.h>
#include <soc/soc.h>
#include <soc/vop.h>
+#include <framebuffer_info.h>
#include "chip.h"
@@ -160,7 +161,7 @@ retry_edp:
break;
}
mainboard_power_on_backlight();
- set_vbe_mode_info_valid(&edid, (uintptr_t)0);
+ fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
return;
}