diff options
| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2017-06-15 12:18:23 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-28 18:24:01 +0000 |
| commit | 94ee937e7a02e767884452555e87bf7a21fdc61f (patch) | |
| tree | dc70feed922913bfe62ab6700959950b027b7a9d /src/soc | |
| parent | 218579801928e65128c59ddfaa13b99f8f067663 (diff) | |
| download | coreboot-94ee937e7a02e767884452555e87bf7a21fdc61f.tar.xz | |
soc/amd/stoneyridge: Enable early cbmem
Add a memmap file with a cbmem_top() function. Remove the
LATE_CBMEM_INIT, allowing the default of EARLY. Remove calls
to the late-only set_top_of_ram() function.
Change-Id: I11ad7190031c912642a7312f2fc6f792866288b7
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/19751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/ramtop.c | 12 |
2 files changed, 12 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 9c184edb2d..6584fbb713 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -35,7 +35,6 @@ config CPU_SPECIFIC_OPTIONS select HAVE_USBDEBUG_OPTIONS select HAVE_HARD_RESET select LAPIC_MONOTONIC_TIMER - select LATE_CBMEM_INIT select SPI_FLASH if HAVE_ACPI_RESUME select TSC_SYNC_LFENCE select SOC_AMD_COMMON diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c index 8fa81c715a..c81e73b4e1 100644 --- a/src/soc/amd/stoneyridge/ramtop.c +++ b/src/soc/amd/stoneyridge/ramtop.c @@ -15,6 +15,8 @@ #include <stdint.h> #include <arch/io.h> +#include <cpu/x86/msr.h> +#include <cpu/amd/mtrr.h> #include <cbmem.h> #define CBMEM_TOP_SCRATCHPAD 0x78 @@ -31,3 +33,13 @@ uintptr_t restore_top_of_low_cacheable(void) top_cache = pci_read_config16(PCI_DEV(0,0,0), CBMEM_TOP_SCRATCHPAD); return (top_cache << 16); } + +void *cbmem_top(void) +{ + msr_t tom = rdmsr(TOP_MEM); + + if (!tom.lo) + return 0; + else + return (void *)restore_top_of_low_cacheable(); +} |