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authorSubrata Banik <subrata.banik@intel.com>2017-11-28 17:54:15 +0530
committerSubrata Banik <subrata.banik@intel.com>2017-12-07 02:39:01 +0000
commitb7b5666110bdbcccded5d929f6d44e9140c413e0 (patch)
treedb8398b3599b76a01610f7d38bf93f0e168af80a /src/soc
parentcb771a2383c7261a7444ed4ba0bee90c157f7703 (diff)
downloadcoreboot-b7b5666110bdbcccded5d929f6d44e9140c413e0.tar.xz
soc/intel/apollolake: Make use of Intel common Graphics block
TEST=Build and boot reef. Change-Id: I0edd7454912201598c43e35990e470ec18a32638 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/22616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/apollolake/Kconfig1
-rw-r--r--src/soc/intel/apollolake/graphics.c52
2 files changed, 9 insertions, 44 deletions
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
index 6a22887454..99e50e3ec2 100644
--- a/src/soc/intel/apollolake/Kconfig
+++ b/src/soc/intel/apollolake/Kconfig
@@ -71,6 +71,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES
select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG
select SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY
+ select SOC_INTEL_COMMON_BLOCK_GRAPHICS
select SOC_INTEL_COMMON_BLOCK_ITSS
select SOC_INTEL_COMMON_BLOCK_I2C
select SOC_INTEL_COMMON_BLOCK_LPC
diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c
index 90859d5c48..4fa525e6f1 100644
--- a/src/soc/intel/apollolake/graphics.c
+++ b/src/soc/intel/apollolake/graphics.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2015-2016 Intel Corp.
+ * Copyright (C) 2015-2017 Intel Corp.
* (Written by Alexandru Gagniuc <alexandrux.gagniuc@intel.com> for Intel Corp.)
*
* This program is free software; you can redistribute it and/or modify
@@ -15,34 +15,21 @@
* GNU General Public License for more details.
*/
-#include <arch/acpi.h>
#include <arch/acpigen.h>
#include <console/console.h>
#include <fsp/util.h>
#include <device/device.h>
#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <soc/pci_devs.h>
+#include <intelblocks/graphics.h>
#include <soc/intel/common/opregion.h>
uintptr_t fsp_soc_get_igd_bar(void)
{
- device_t dev = SA_DEV_IGD;
-
- /* Check if IGD PCI device is disabled */
- if (!dev->enabled)
- return 0;
-
- return find_resource(dev, PCI_BASE_ADDRESS_2)->base;
-}
-
-static void igd_set_resources(struct device *dev)
-{
- pci_dev_set_resources(dev);
+ return graphics_get_memory_base();
}
-static unsigned long igd_write_opregion(device_t dev, unsigned long current,
- struct acpi_rsdp *rsdp)
+uintptr_t graphics_soc_write_acpi_opregion(struct device *device,
+ uintptr_t current, struct acpi_rsdp *rsdp)
{
igd_opregion_t *opregion;
uint16_t reg16;
@@ -77,34 +64,11 @@ static unsigned long igd_write_opregion(device_t dev, unsigned long current,
* Maybe it should move to the finalize handler.
*/
- pci_write_config32(dev, ASLS, (uintptr_t)opregion);
- reg16 = pci_read_config16(dev, SWSCI);
+ pci_write_config32(device, ASLS, (uintptr_t)opregion);
+ reg16 = pci_read_config16(device, SWSCI);
reg16 &= ~(1 << 0);
reg16 |= (1 << 15);
- pci_write_config16(dev, SWSCI, reg16);
+ pci_write_config16(device, SWSCI, reg16);
return acpi_align_current(current);
}
-
-static const struct device_operations igd_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = igd_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = pci_dev_init,
- .write_acpi_tables = igd_write_opregion,
- .enable = DEVICE_NOOP
-};
-
-static const unsigned short pci_device_ids[] = {
- PCI_DEVICE_ID_INTEL_APL_IGD_HD_505,
- PCI_DEVICE_ID_INTEL_APL_IGD_HD_500,
- PCI_DEVICE_ID_INTEL_GLK_IGD,
- PCI_DEVICE_ID_INTEL_GLK_IGD_EU12,
- 0,
-};
-
-static const struct pci_driver integrated_graphics_driver __pci_driver = {
- .ops = &igd_ops,
- .vendor = PCI_VENDOR_ID_INTEL,
- .devices = pci_device_ids,
-};