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authorFurquan Shaikh <furquan@google.com>2020-06-13 00:16:26 -0700
committerFelix Held <felix-coreboot@felixheld.de>2020-06-17 18:51:25 +0000
commitca481ee87f3d10d2b2ca6de8151a79850f059585 (patch)
tree6e9dcc62527b1443a814f02197827f004d06c18a /src/soc
parent4c466c9c9624a02d287092f1cfa87fde77f0cb3c (diff)
downloadcoreboot-ca481ee87f3d10d2b2ca6de8151a79850f059585.tar.xz
soc/amd/picasso: fix build if PICASSO_UART is unset
This change includes uart.c in bootblock, romstage, ramstage and verstage unconditionally because this file is handling more than just the UART console configuration. This allows boards to take advantage of picasso_uart_mmio_ops even if PICASSO_UART is not selected. uart_platform_base and uart_platform_refclk mustn't be provided if PICASSO_UART is unset, so add an #if around those functions. BUG=b:158346697 TEST=Mandolin builds again. Change-Id: If1173034b0d2ed32f77241768e1e8abb208aac3a Signed-off-by: Furquan Shaikh <furquan@google.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42339 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/picasso/Makefile.inc8
-rw-r--r--src/soc/amd/picasso/uart.c22
2 files changed, 21 insertions, 9 deletions
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc
index 03ce272d4d..98948775d9 100644
--- a/src/soc/amd/picasso/Makefile.inc
+++ b/src/soc/amd/picasso/Makefile.inc
@@ -15,7 +15,7 @@ bootblock-y += bootblock/bootblock.c
bootblock-y += aoac.c
bootblock-y += southbridge.c
bootblock-y += i2c.c
-bootblock-$(CONFIG_PICASSO_UART) += uart.c
+bootblock-y += uart.c
bootblock-y += tsc_freq.c
bootblock-y += gpio.c
bootblock-y += smi_util.c
@@ -26,7 +26,7 @@ romstage-y += romstage.c
romstage-y += gpio.c
romstage-y += pmutil.c
romstage-y += memmap.c
-romstage-$(CONFIG_PICASSO_UART) += uart.c
+romstage-y += uart.c
romstage-y += tsc_freq.c
romstage-y += aoac.c
romstage-y += southbridge.c
@@ -40,7 +40,7 @@ verstage-y += i2c.c
verstage-y += pmutil.c
verstage-y += config.c
verstage-y += aoac.c
-verstage-$(CONFIG_PICASSO_UART) += uart.c
+verstage-y += uart.c
verstage-y += tsc_freq.c
ramstage-y += i2c.c
@@ -60,7 +60,7 @@ ramstage-y += sata.c
ramstage-y += memmap.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
-ramstage-$(CONFIG_PICASSO_UART) += uart.c
+ramstage-y += uart.c
ramstage-y += usb.c
ramstage-y += tsc_freq.c
ramstage-y += finalize.c
diff --git a/src/soc/amd/picasso/uart.c b/src/soc/amd/picasso/uart.c
index 6439efb251..f523bce162 100644
--- a/src/soc/amd/picasso/uart.c
+++ b/src/soc/amd/picasso/uart.c
@@ -30,6 +30,16 @@ static const struct _uart_info {
} },
};
+/*
+ * Don't provide uart_platform_base and uart_platform_refclk functions if PICASSO_UART
+ * isn't selected. Those two functions are used by the console UART driver and need to be
+ * provided exactly once and only by the UART that is used for console.
+ *
+ * TODO: Replace the #if block by factoring out the two functions into a different compilation
+ * unit.
+ */
+#if CONFIG(PICASSO_UART)
+
uintptr_t uart_platform_base(int idx)
{
if (idx < 0 || idx >= ARRAY_SIZE(uart_info))
@@ -38,6 +48,13 @@ uintptr_t uart_platform_base(int idx)
return uart_info[idx].base;
}
+unsigned int uart_platform_refclk(void)
+{
+ return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
+}
+
+#endif /* PICASSO_UART */
+
void clear_uart_legacy_config(void)
{
write16((void *)FCH_UART_LEGACY_DECODE, 0);
@@ -75,11 +92,6 @@ void set_uart_config(int idx)
}
}
-unsigned int uart_platform_refclk(void)
-{
- return CONFIG(PICASSO_UART_48MZ) ? 48000000 : 115200 * 16;
-}
-
static const char *uart_acpi_name(const struct device *dev)
{
switch (dev->path.mmio.addr) {