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authorSubrata Banik <subrata.banik@intel.com>2021-01-15 12:16:05 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-01-21 03:28:56 +0000
commitd74cd60b8159c3928dba318e6387f200ff3bb0e7 (patch)
treef11980371f55fd6dd38416358ea571f814b93171 /src/soc
parent0591348833f730a42e74039d8e2d957ec94a39d5 (diff)
downloadcoreboot-d74cd60b8159c3928dba318e6387f200ff3bb0e7.tar.xz
soc/intel/alderlake: Disable Internal Gfx based on SOC_INTEL_DISABLE_IGD
Make IGD disable when mainboard user selects SOC_INTEL_DISABLE_IGD. TEST=Able to get depthcharge pre-OS splash screen with AMD Radeon RX 5700 PCI-E DGPU when mainboard user selects SOC_INTEL_DISABLE_IGD. Change-Id: Ibbe9c8c4d77018de83815d7d203284b1fbc0da58 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49291 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/romstage/fsp_params.c11
1 files changed, 6 insertions, 5 deletions
diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c
index a615f0bc6a..0154cb4848 100644
--- a/src/soc/intel/alderlake/romstage/fsp_params.c
+++ b/src/soc/intel/alderlake/romstage/fsp_params.c
@@ -22,12 +22,13 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
uint32_t mask = 0;
const struct device *dev;
- /*
- * If IGD is enabled, set IGD stolen size to 60MB.
- * Otherwise, skip IGD init in FSP.
- */
dev = pcidev_path_on_root(SA_DEVFN_IGD);
- m_cfg->InternalGfx = is_dev_enabled(dev);
+ if (!CONFIG(SOC_INTEL_DISABLE_IGD) && is_dev_enabled(dev))
+ m_cfg->InternalGfx = 1;
+ else
+ m_cfg->InternalGfx = 0;
+
+ /* If IGD is enabled, set IGD stolen size to 60MB. Otherwise, skip IGD init in FSP */
m_cfg->IgdDvmt50PreAlloc = m_cfg->InternalGfx ? IGD_SM_60MB : 0;
m_cfg->TsegSize = CONFIG_SMM_TSEG_SIZE;