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authorRonald G. Minnich <rminnich@gmail.com>2014-12-31 19:44:22 -0800
committerRonald G. Minnich <rminnich@gmail.com>2015-01-01 18:07:14 +0100
commite8897c45a80394f3eaab42d2805c4bae97732b8c (patch)
tree168577aa758ea0c2c52a18b025e757773b001cfd /src/soc
parent922b3ca8e515f0b3079ba4dfc9bc778102b48089 (diff)
downloadcoreboot-e8897c45a80394f3eaab42d2805c4bae97732b8c.tar.xz
soc/riscv: Fix typo in src/soc/ucb/Makefile.inc.
riscv builds again. Change-Id: I4caaee49c3eaa948540a916f684dd4e1ed9c9011 Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: http://review.coreboot.org/8026 Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/ucb/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/ucb/Makefile.inc b/src/soc/ucb/Makefile.inc
index 35bc72871c..fe40742484 100644
--- a/src/soc/ucb/Makefile.inc
+++ b/src/soc/ucb/Makefile.inc
@@ -1 +1 @@
-subdirs-$(CONFIG_CPU_UCB_RISCV) += riscv
+subdirs-$(CONFIG_SOC_UCB_RISCV) += riscv