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authorAaron Durbin <adurbin@chromium.org>2015-03-17 13:20:02 -0500
committerAaron Durbin <adurbin@google.com>2015-03-20 19:28:52 +0100
commitf5d7f605aba97451f3116cf6489c0e31b5554427 (patch)
tree760c54276be0be592ef0456ccd874ed179402322 /src/soc
parente4f3e7a9c656356a92e827d5a39b85106cbdaf3a (diff)
downloadcoreboot-f5d7f605aba97451f3116cf6489c0e31b5554427.tar.xz
bootblocks: use run_romstage()
Instead of sprinkling the cbfs calls around (as well as getting return values incorrect) use the common run_romstage() to perform the necessary work to load and run romstage. Change-Id: Id59f47febf5122cb3ee60f9741cfb58cb60ccab5 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8711 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/nvidia/tegra132/bootblock.c17
1 files changed, 2 insertions, 15 deletions
diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index ad78f51f16..5a6050a2b9 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -20,19 +20,16 @@
#include <arch/exception.h>
#include <arch/hlt.h>
#include <bootblock_common.h>
-#include <cbfs.h>
#include <console/console.h>
+#include <program_loading.h>
#include <soc/clock.h>
#include <soc/nvidia/tegra/apbmisc.h>
-#include <arch/stages.h>
#include "pinmux.h"
#include "power.h"
void main(void)
{
- void *entry;
-
// enable pinmux clamp inputs
clamp_tristate_inputs();
@@ -68,15 +65,5 @@ void main(void)
printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n");
- entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA,
- CONFIG_CBFS_PREFIX "/romstage");
-
- if (entry) {
- printk(BIOS_INFO, "T132 bootblock: jumping to romstage\n");
- stage_exit(entry);
- } else {
- printk(BIOS_INFO, "T132 bootblock: fallback/romstage not found\n");
- }
-
- hlt();
+ run_romstage();
}