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| author | Matt DeVillier <matt.devillier@gmail.com> | 2017-04-17 18:45:55 -0500 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-02 18:29:34 +0200 |
| commit | f9c46f0ebced9e750e4df05e33ebbaa7b7073aa4 (patch) | |
| tree | 6cbcf6b7e902f267104816f65b3c753e9a761936 /src/soc | |
| parent | 2b1e996bbf7a176cc0c868546d6a13ff010dd069 (diff) | |
| download | coreboot-f9c46f0ebced9e750e4df05e33ebbaa7b7073aa4.tar.xz | |
soc/baytrail: add missing USB port defs
Add device/address stub for XHCI USB port 7.
Stub data will be supplemented by board-specific info
added in subsequent commits.
Change-Id: Iae874a9ba01e9428e07cf7ff15e663365b2354a9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/19972
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/acpi/xhci.asl | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl index dbd34474f8..bef0b9ff2f 100644 --- a/src/soc/intel/baytrail/acpi/xhci.asl +++ b/src/soc/intel/baytrail/acpi/xhci.asl @@ -27,5 +27,6 @@ Device (XHCI) Device (PRT2) { Name (_ADR, 2) } Device (PRT3) { Name (_ADR, 3) } Device (PRT4) { Name (_ADR, 4) } + Device (SSP1) { Name (_ADR, 7) } } } |