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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-07 11:20:54 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2015-02-14 22:37:44 +0100 |
| commit | 41cd047cd25b5fbb02da3e37b9dc2ca6ca90e34e (patch) | |
| tree | 320b9f4dc6a7b6d2741f83113ac054a64a279c7e /src/southbridge/amd/cimx/sb800/cfg.c | |
| parent | 8dba709a064c9a88d20942cbd1d7191f99baf2f8 (diff) | |
| download | coreboot-41cd047cd25b5fbb02da3e37b9dc2ca6ca90e34e.tar.xz | |
AMD cimx/sb800: Move cimx init for ramstage
This has nothing to do with SATA controller. We only need to
fill the table with defaults before we parse devicetree for
changes to device configuration.
Change-Id: Ic4b28b5992ec9bfdf252f61b1c86b0162243cc95
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8386
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Dave Frodin <dave.frodin@se-eng.com>
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/cfg.c')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/cfg.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c index ac6e6aeb81..c6142409f1 100644 --- a/src/southbridge/amd/cimx/sb800/cfg.c +++ b/src/southbridge/amd/cimx/sb800/cfg.c @@ -132,11 +132,4 @@ void sb800_cimx_config(AMDSBCFG *sb_config) sb_config->GppPhyPllPowerDown = TRUE; //GPP power saving sb_config->SBGecPwr = 0x03;//11b << 5, rpr BDF: 00:20:06 sb_config->GecConfig = GEC_CONFIG; - -#ifndef __PRE_RAM__ - /* ramstage cimx config here */ - if (!sb_config->StdHeader.CALLBACK.CalloutPtr) { - sb_config->StdHeader.CALLBACK.CalloutPtr = sb800_callout_entry; - } -#endif //!__PRE_RAM__ } |