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| author | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 15:34:03 +0000 |
|---|---|---|
| committer | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 15:34:03 +0000 |
| commit | 706aed8eb9c1836d1b6c53b081f789a1d3afaa25 (patch) | |
| tree | 953355608f5491e7e046a30e0cba007e27522bf9 /src/southbridge/intel/i82801ca/cmos_failover.c | |
| parent | 09e4ef670245566f1ee50759976babac17aae55d (diff) | |
| download | coreboot-706aed8eb9c1836d1b6c53b081f789a1d3afaa25.tar.xz | |
Initial revision.
Based on i82801er and LB v1 code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801ca/cmos_failover.c')
| -rw-r--r-- | src/southbridge/intel/i82801ca/cmos_failover.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ca/cmos_failover.c b/src/southbridge/intel/i82801ca/cmos_failover.c new file mode 100644 index 0000000000..6197ef677a --- /dev/null +++ b/src/southbridge/intel/i82801ca/cmos_failover.c @@ -0,0 +1,19 @@ +//kind of cmos_err for ich3
+
+#include "i82801ca.h"
+ +static void check_cmos_failed(void) +{
+#if HAVE_OPTION_TABLE + uint8_t byte = pci_read_config8(PCI_DEV(0,0x1f,0),GEN_PMCON_3);
+ + if( byte & RTC_BATTERY_DEAD) { + // Set boot_option and last_boot to 'Fallback',
+ // clear reboot_bits + byte = cmos_read(RTC_BOOT_BYTE); + byte &= 0x0c; + byte |= MAX_REBOOT_CNT << 4; + cmos_write(byte, RTC_BOOT_BYTE); + }
+#endif +} |