diff options
| author | Ryan Salsamendi <rsalsamendi@hotmail.com> | 2017-06-30 17:15:57 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-02 18:54:39 +0000 |
| commit | 0d9b360b42d39d211d62f0c213aae9e7cf3f2924 (patch) | |
| tree | b4e0b236cdade276520d9d92b29fb3efe4c7b442 /src/southbridge/intel/lynxpoint/usb_xhci.c | |
| parent | 0c731b512a6adf3aa9ecee5e89b6514e75ed6653 (diff) | |
| download | coreboot-0d9b360b42d39d211d62f0c213aae9e7cf3f2924.tar.xz | |
southbridge/intel/lynxpoint: Fix undefined behavior
Fix reports found by undefined behavior sanitizer. Left shifting an int
where the right operand is >= the width of the type is undefined. Add
UL suffix since it's safe for unsigned types.
Change-Id: I755b3c80a8d1b6cb6b6e5f411c6691e5dd17c266
Signed-off-by: Ryan Salsamendi <rsalsamendi@hotmail.com>
Reviewed-on: https://review.coreboot.org/20443
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/usb_xhci.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/usb_xhci.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c index 0acf35ff7c..28e6521598 100644 --- a/src/southbridge/intel/lynxpoint/usb_xhci.c +++ b/src/southbridge/intel/lynxpoint/usb_xhci.c @@ -342,13 +342,13 @@ static void usb_xhci_init(device_t dev) /* D20:F0:44h[31] = 1 (Access Control Bit) */ reg32 = pci_read_config32(dev, 0x44); - reg32 |= (1 << 31); + reg32 |= (1UL << 31); pci_write_config32(dev, 0x44, reg32); /* D20:F0:40h[31,23] = 10b (OC Configuration Done) */ reg32 = pci_read_config32(dev, 0x40); reg32 &= ~(1 << 23); /* unsupported request */ - reg32 |= (1 << 31); + reg32 |= (1UL << 31); pci_write_config32(dev, 0x40, reg32); if (acpi_is_wakeup_s3()) { |