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authorPatrick Georgi <patrick.georgi@coresystems.de>2010-12-18 07:48:43 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2010-12-18 07:48:43 +0000
commitbe61a173512ece32de01562995a91fbbf3f5b335 (patch)
treeacf01fc4637bc97ca0e395158254a57ae247a402 /src/southbridge/intel/sch/south.c
parent312fc96874ff2b3fd1a839b72dd10edb1b8937b8 (diff)
downloadcoreboot-be61a173512ece32de01562995a91fbbf3f5b335.tar.xz
Support Intel SCH (Poulsbo) and add iwave/iWRainbowG6 board
which uses it. Compiles, but not boot tested lately. Many things missing (eg. SMM support, proper ACPI, ...) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/sch/south.c')
-rw-r--r--src/southbridge/intel/sch/south.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/src/southbridge/intel/sch/south.c b/src/southbridge/intel/sch/south.c
new file mode 100644
index 0000000000..e7c283f9a8
--- /dev/null
+++ b/src/southbridge/intel/sch/south.c
@@ -0,0 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pci.h>
+
+struct chip_operations southbridge_intel_sch_ops = {
+ CHIP_NAME("Intel SCH Southbridge")
+};
+