diff options
| author | Anish K Patel <anishp@win-ent.com> | 2010-02-14 16:13:03 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-02-14 16:13:03 +0000 |
| commit | 13df640bf7a9b7e402fd4d3082415ab65ef45057 (patch) | |
| tree | 78be873dd1139146f533285cbdbf3a6cea3d024c /src/superio/winbond | |
| parent | 516255e6330873470590c843f569a31e52508c00 (diff) | |
| download | coreboot-13df640bf7a9b7e402fd4d3082415ab65ef45057.tar.xz | |
Add w83627hf_set_clksel_48() function which sets CLKSEL to 48MHz.
The Win Ent platforms are using the Winbond W83627HG part, but this part does
not appear to enable 48MHz clock by default as claimed in the datasheet.
Signed-off-by: Anish K Patel <anishp@win-ent.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5125 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/superio/winbond')
| -rw-r--r-- | src/superio/winbond/w83627hf/w83627hf_early_serial.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/superio/winbond/w83627hf/w83627hf_early_serial.c b/src/superio/winbond/w83627hf/w83627hf_early_serial.c index cc0bf1cfe4..e4b49d1eee 100644 --- a/src/superio/winbond/w83627hf/w83627hf_early_serial.c +++ b/src/superio/winbond/w83627hf/w83627hf_early_serial.c @@ -45,3 +45,13 @@ static void w83627hf_enable_serial(device_t dev, unsigned iobase) pnp_set_enable(dev, 1); pnp_exit_ext_func_mode(dev); } + +static void w83627hf_set_clksel_48(device_t dev) +{ + unsigned port = dev >> 8; + pnp_enter_ext_func_mode(dev); + outb(0x24, port); + /* Set CLKSEL (clock input on pin 1) to 48MHz. */ + outb(inb(port + 1) | (1 << 6), port + 1); + pnp_exit_ext_func_mode(dev); +} |