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authorDavid Hendricks <dhendricks@fb.com>2017-12-01 20:49:48 -0800
committerPatrick Rudolph <siro@das-labor.org>2018-07-10 07:01:57 +0000
commit8cbd569f74d8929387730e45b0d6e993b1365c02 (patch)
treeca6414a4d81e37280887b0da0f1a6120a50f0a3a /src/vendorcode
parent03d31427338ba59d3a354ac1beb3b0c153471768 (diff)
downloadcoreboot-8cbd569f74d8929387730e45b0d6e993b1365c02.tar.xz
cavium: Add CN81xx SoC and eval board support
This adds Cavium CN81xx SoC and SFF EVB files. Code is based off of Cavium's Octeon-TX SDK: https://github.com/Cavium-Open-Source-Distributions/OCTEON-TX-SDK BDK coreboot differences: bootblock: - Get rid of BDK header - Add Kconfig for link address - Move CAR setup code into assembly - Move unaligned memory access enable into assembly - Implement custom bootblock entry function - Add CLIB and CSIB blobs romstage: - Use minimal DRAM init only devicetree: - Convert FTD to static C file containing key value pairs Tested on CN81xx: - Boots to payload - Tested with GNU/Linux 4.16.3 - All hardware is usable (after applying additional commits) Implemented in future commits: - Vboot integration - MMU suuport - L2 Cache handling - ATF from external repo - Devicetree patching - Extended DRAM testing - UART init Not working: - Booting a payload - Booting upstream ATF TODO: - Configuration straps Change-Id: I47b4412d29203b45aee49bfa026c1d86ef7ce688 Signed-off-by: David Hendricks <dhendricks@fb.com> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/23037 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Diffstat (limited to 'src/vendorcode')
-rw-r--r--src/vendorcode/cavium/include/bdk/bdk-coreboot.h173
-rw-r--r--src/vendorcode/cavium/include/bdk/bdk-minimal.h14
2 files changed, 178 insertions, 9 deletions
diff --git a/src/vendorcode/cavium/include/bdk/bdk-coreboot.h b/src/vendorcode/cavium/include/bdk/bdk-coreboot.h
new file mode 100644
index 0000000000..7b417b6c02
--- /dev/null
+++ b/src/vendorcode/cavium/include/bdk/bdk-coreboot.h
@@ -0,0 +1,173 @@
+/*
+ * This file is part of the coreboot project.
+ * Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights
+ * reserved.
+ * Copyright 2018-present Facebook, Inc.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * access.h: Wrappers for memory access
+ */
+
+#ifndef __BDK_BDK_COREBOOT_H
+#define __BDK_BDK_COREBOOT_H
+
+#include <arch/io.h>
+#include <delay.h>
+
+/**
+ * Convert a memory pointer (void*) into a hardware compatible
+ * memory address (uint64_t). Cavium hardware widgets don't
+ * understand logical addresses.
+ *
+ * @param ptr C style memory pointer
+ * @return Hardware physical address
+ */
+static inline uint64_t bdk_ptr_to_phys(void *ptr)
+{
+ /* PA = VA for coreboot's purposes */
+ return (uint64_t)ptr;
+}
+
+/**
+ * Convert a hardware physical address (uint64_t) into a
+ * memory pointer (void *).
+ *
+ * @param physical_address
+ * Hardware physical address to memory
+ * @return Pointer to memory
+ */
+static inline void *bdk_phys_to_ptr(uint64_t physical_address)
+{
+ /* PA = VA for coreboot's purposes */
+ return (void *)physical_address;
+}
+
+static inline void bdk_write64_int64(uint64_t address, int64_t value)
+{
+ dmb();
+ *(volatile int64_t *)address = value;
+ dmb();
+}
+
+static inline void bdk_write64_uint64(uint64_t address, uint64_t value)
+{
+ write64(bdk_phys_to_ptr(address), value);
+}
+
+static inline void bdk_write64_int32(uint64_t address, int32_t value)
+{
+ dmb();
+ *(volatile int32_t *)address = value;
+ dmb();
+}
+
+static inline void bdk_write64_uint32(uint64_t address, uint32_t value)
+{
+ write32(bdk_phys_to_ptr(address), value);
+}
+
+static inline void bdk_write64_int16(uint64_t address, int16_t value)
+{
+ dmb();
+ *(volatile int16_t *)address = value;
+ dmb();
+}
+
+static inline void bdk_write64_uint16(uint64_t address, uint16_t value)
+{
+ write16(bdk_phys_to_ptr(address), value);
+}
+
+static inline void bdk_write64_int8(uint64_t address, int8_t value)
+{
+ dmb();
+ *(volatile int8_t *)address = value;
+ dmb();
+}
+
+static inline void bdk_write64_uint8(uint64_t address, uint8_t value)
+{
+ write8(bdk_phys_to_ptr(address), value);
+}
+
+static inline int64_t bdk_read64_int64(uint64_t address)
+{
+ return *(volatile int64_t *)bdk_phys_to_ptr(address);
+}
+
+static inline uint64_t bdk_read64_uint64(uint64_t address)
+{
+ return read64(bdk_phys_to_ptr(address));
+}
+
+static inline int32_t bdk_read64_int32(uint64_t address)
+{
+ return *(volatile int32_t *)bdk_phys_to_ptr(address);
+}
+
+static inline uint32_t bdk_read64_uint32(uint64_t address)
+{
+ return read32(bdk_phys_to_ptr(address));
+}
+
+static inline int16_t bdk_read64_int16(uint64_t address)
+{
+ return *(volatile int16_t *)bdk_phys_to_ptr(address);
+}
+
+static inline uint16_t bdk_read64_uint16(uint64_t address)
+{
+ return read16(bdk_phys_to_ptr(address));
+}
+
+static inline int8_t bdk_read64_int8(uint64_t address)
+{
+ return *(volatile int8_t *)bdk_phys_to_ptr(address);
+}
+
+static inline uint8_t bdk_read64_uint8(uint64_t address)
+{
+ return read8(bdk_phys_to_ptr(address));
+}
+
+/**
+ * Returns the number of bits set in the provided value.
+ * Simple wrapper for POP instruction.
+ *
+ * @param val 32 bit value to count set bits in
+ *
+ * @return Number of bits set
+ */
+inline uint32_t bdk_pop(uint32_t v)
+{
+ /* Use parallel SWAR algorithm */
+ v = v - ((v >> 1) & 0x55555555);
+ v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
+ return (((v + (v >> 4)) & 0xF0F0F0F) * 0x1010101) >> 24;
+}
+
+/**
+ * Returns the number of bits set in the provided value.
+ * Simple wrapper for DPOP instruction.
+ *
+ * @param val 64 bit value to count set bits in
+ *
+ * @return Number of bits set
+ */
+inline int bdk_dpop(uint64_t val)
+{
+ return bdk_pop(val & 0xffffffff) + bdk_pop(val >> 32);
+}
+
+/**
+ * Wait for the specified number of micro seconds
+ *
+ * @param usec micro seconds to wait
+ */
+static inline void bdk_wait_usec(uint64_t usec)
+{
+ udelay((unsigned int)usec);
+}
+
+#endif /* !__BDK_BDK_COREBOOT_H */
diff --git a/src/vendorcode/cavium/include/bdk/bdk-minimal.h b/src/vendorcode/cavium/include/bdk/bdk-minimal.h
index 3ecf5a700a..e22e8a1524 100644
--- a/src/vendorcode/cavium/include/bdk/bdk-minimal.h
+++ b/src/vendorcode/cavium/include/bdk/bdk-minimal.h
@@ -10,13 +10,12 @@
* bdk-minimal.h: Subset of bdk.h used by coreboot
*/
-#ifndef __SOC_CAVIUM_COMMON_BDK_MINIMAL_H__
-#define __SOC_CAVIUM_COMMON_BDK_MINIMAL_H__
+#ifndef BDK_MINIMAL_H__
+#define BDK_MINIMAL_H__
#include <console/console.h> /* for printk */
#include <endian.h>
#include <stddef.h> /* for NULL */
-#include <libbdk-hal/bdk-access.h>
#define bdk_le16_to_cpu(x) le16_to_cpu(x)
#define bdk_le32_to_cpu(x) le32_to_cpu(x)
@@ -28,11 +27,6 @@
#define bdk_cpu_to_le32(x) cpu_to_le32(x)
#define bdk_cpu_to_le64(x) cpu_to_le64(x)
-#define __BYTE_ORDER __BYTE_ORDER__
-/* Watch out for __BIG_ENDIAN. coreboot usually checks if it's defined at all
- * but the Cavium BDK checks its value. */
-#define __BIG_ENDIAN 4321
-
#define printf(format, ...) printk(BIOS_DEBUG, format, ##__VA_ARGS__)
#define puts(str) printk(BIOS_INFO, str)
#define fflush(x) /* output gets flushed automatically */
@@ -42,8 +36,10 @@
#include <libbdk-arch/bdk-asm.h>
#include <libbdk-arch/bdk-model.h>
#include <libbdk-arch/bdk-numa.h>
+#include <libbdk-hal/bdk-access.h>
#include <libbdk-arch/bdk-require.h>
+
#include <libbdk-arch/bdk-csr.h>
#include <libbdk-os/bdk-thread.h>
@@ -57,4 +53,4 @@
static inline char *getenv(const char *name) { return NULL; }
-#endif /* !__SOC_CAVIUM_COMMON_BDK_MINIMAL_H__ */
+#endif /* BDK_MINIMAL_H__ */