summaryrefslogtreecommitdiff
path: root/src/vendorcode
AgeCommit message (Expand)Author
2020-09-15chromeos: Provide common watchdog reboot support in romstageRavi Kumar Bokka
2020-09-14src/vendorcode/intel/fsp/fsp2_0/cpx-sp: add prev boot error info HOB header fileJonathan Zhang
2020-09-11vc/amd/fsp/picasso: Fix FSP-S UPD header file formattingFelix Held
2020-09-10vc/amd/fsp/picasso: Sync FSP-S UPD header fileMarshall Dawson
2020-09-10vendorcode/intel/fsp/alderlake: Fix FSPS_ARCH_UPD redefinition issueSubrata Banik
2020-09-09vendorcode/intel/fsp/fsp2_0/adl: Add FSP header file version 1332Subrata Banik
2020-09-08vc/intel/fsp/fsp2_0/cpx_sp: Add DIMM definition in SystemMemoryMapHobJohnny Lin
2020-09-08vendorcode/intel/FSP2_0/CPX-SP: update to ww36Jonathan Zhang
2020-09-08vendorcode/intel/fsp/fsp2_0/cpx_sp: Set correct stack number for IOU3Johnny Lin
2020-09-08vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3333Srinidhi N Kaushik
2020-09-01{include,mb,soc,sb,vendorcode}: Make hexadecimal notation consistentSubrata Banik
2020-08-31vendorcode/google: Add error handlingJohn Zhao
2020-08-28vc/amd/fsp/picasso: Add FSP-M UPD enable_sata to 0xC7 to match FSPNikolai Vyssotski
2020-08-28vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww34 release and adapt socJonathan Zhang
2020-08-27symbols: Change implementation details of DECLARE_OPTIONAL_REGION()Julius Werner
2020-08-26vc/amd/agesa/f15tn: add DDR1866_FREQUENCY to DdrMaxRateTab tableMike Banon
2020-08-25vendorcode/intel/fsp: Add Jasper Lake FSP headers for FSP v2295Ronak Kanabar
2020-08-24vc/google/chromeos: load wifi_sar_defaults.hex as the main WiFi SAR CBFS sourceKevin Chiu
2020-08-24nb/amd/agesa: define DDR3_SPD_SIZE as a common valueMike Banon
2020-08-24edk2-stable202005/IntelFsp2Pkg: Add FSP*_ARCH_UPD.Ronak Kanabar
2020-08-23vc/amd/fsp/picasso: add FSP-M UPD to disable the HD Audio controllerFelix Held
2020-08-23Revert "vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controller"Felix Held
2020-08-22vendorcode/google/chromeos: Introduce helper for CSE board resetKarthikeyan Ramasubramanian
2020-08-20vc/amd/agesa/f16kb: raise the UDIMM Freq limit 1333MT/s values to 1600MT/sMike Banon
2020-08-19vc/amd/fsp/picasso: update pci descriptor commentsMatt Papageorge
2020-08-17vc/amd/agesa/f15tn: add 933 MHz to GfxMemClockFrequencyDefinitionTableMike Banon
2020-08-17vc/amd/fsp/picasso: add FSP-M UPD to disable the SATA controllerFelix Held
2020-08-14vendercode/intel/fsp/fsp2_0/glk: Update FSP header file per v2.2.0Seunghwan Kim
2020-08-13vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-08-13vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3313Srinidhi N Kaushik
2020-08-11vendorcode/intel/fsp/fsp2_0/CPX-SP: remove non-existing PSTACKsJonathan Zhang
2020-08-08vendorcode/intel/fsp/fsp2_0/CPX-SP: update to ww32 release and adapt socJonathan Zhang
2020-08-05vendorcode/amd/fsp/picasso Fix type 17 smbios misalignmentJason Glenesk
2020-08-02vc/amd/fsp/picasso: document requirements for DXIO PCIe port assignmentsFelix Held
2020-07-31vc/amd/fsp/picasso: document DXIO lane number mappingFelix Held
2020-07-30vc/amd/picasso/bl_uapp: Update header fileMarshall Dawson
2020-07-28vc/cavium: Fix up license headersAngel Pons
2020-07-26amd/picasso: rework USB2 PHY tune parameter handlingFelix Held
2020-07-24vc/amd/fsp/picasso: update UPD headerFelix Held
2020-07-23amd/picasso: rename PCIe descriptor to DXIO descriptorFelix Held
2020-07-23vc/amd/fsp/picasso: add logical to lane number in port descriptor structFelix Held
2020-07-23soc/intel/xeon_sp/cpx: display SystemMemoryMapHob fieldsJonathan Zhang
2020-07-22vc/amd/fsp/picasso: mark remaining UPD header structs as __packedFelix Held
2020-07-20vendorcode/intel/fsp: Update Tiger Lake FSP Headers for FSP v3274Srinidhi N Kaushik
2020-07-15amd/picasso: rework DXIO and DDI UPD handlingFelix Held
2020-07-15vc/amd/fsp/picasso: replace #pragma pack(1) with __packed attributeFelix Held
2020-07-12soc/intel/xeon_sp/cpx: use HOB_TYPE_GUID_EXTENSION to interpret platform HOBsJonathan Zhang
2020-07-12vc/amd/fsp/picasso: add DMI data structure definitionsAaron Durbin
2020-07-12vendocode/intel/fsp/fsp2_0/cpx_sp: Update to FSP ww28 release and adapt socJonathan Zhang
2020-07-10vc/amd/pi/00660F01: Drop dead codeAngel Pons
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 11:55:59 +0000