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authorKyösti Mälkki <kyosti.malkki@gmail.com>2020-01-07 12:00:31 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-01-14 18:13:34 +0000
commit8dd2d485b84b103eabae3e01c3b04f529d98ed50 (patch)
treeb3ec644b6c5467a74f912ef2bca6098fedff79f7 /src
parentffa520fc13da3504efb2e9a8d50f5fbd91580a09 (diff)
downloadcoreboot-8dd2d485b84b103eabae3e01c3b04f529d98ed50.tar.xz
intel/nehalem,ibexpeak: Move enable_smbus() call
Change-Id: I6e43f7696b289ce9e0319afdcc73889ddabd4db1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38297 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src')
-rw-r--r--src/northbridge/intel/nehalem/romstage.c3
-rw-r--r--src/southbridge/intel/ibexpeak/early_pch.c1
2 files changed, 1 insertions, 3 deletions
diff --git a/src/northbridge/intel/nehalem/romstage.c b/src/northbridge/intel/nehalem/romstage.c
index 69383e6520..eceb8c2513 100644
--- a/src/northbridge/intel/nehalem/romstage.c
+++ b/src/northbridge/intel/nehalem/romstage.c
@@ -57,9 +57,6 @@ void mainboard_romstage_entry(void)
}
}
- /* Enable SMBUS. */
- enable_smbus();
-
early_thermal_init();
timestamp_add_now(TS_BEFORE_INITRAM);
diff --git a/src/southbridge/intel/ibexpeak/early_pch.c b/src/southbridge/intel/ibexpeak/early_pch.c
index b76115bf84..e462dd8906 100644
--- a/src/southbridge/intel/ibexpeak/early_pch.c
+++ b/src/southbridge/intel/ibexpeak/early_pch.c
@@ -44,6 +44,7 @@ static void pch_default_disable(void)
void early_pch_init(void)
{
early_gpio_init();
+ enable_smbus();
/* TODO, make this configurable */
pch_setup_cir(NEHALEM_MOBILE);
southbridge_configure_default_intmap();