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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-12 15:44:28 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-13 19:28:53 +0000
commit55d0ab5dc47cf319a71e1490ec93d88b2fb5cc2f (patch)
tree779ef715f41068797a336fa5b4cc5f6809130476 /src
parent80f963ccd5989d56caee7563778705d9bfd12275 (diff)
downloadcoreboot-55d0ab5dc47cf319a71e1490ec93d88b2fb5cc2f.tar.xz
intel/broadwell: Replace some __PRE_RAM__ use
Guards are required due to different PCI accessor signatures. Change-Id: I60e87f16a48565917f6ee9d05cc59d2b9373270c Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35381 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src')
-rw-r--r--src/soc/intel/broadwell/pch.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c
index e555588a2e..e6c231924a 100644
--- a/src/soc/intel/broadwell/pch.c
+++ b/src/soc/intel/broadwell/pch.c
@@ -73,7 +73,7 @@ u32 pch_read_soft_strap(int id)
return SPIBAR32(SPIBAR_FDOD);
}
-#ifndef __PRE_RAM__
+#ifndef __SIMPLE_DEVICE__
/* Put device in D3Hot Power State */
static void pch_enable_d3hot(struct device *dev)