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authorAaron Durbin <adurbin@chromium.org>2013-12-04 11:29:46 -0600
committerKyösti Mälkki <kyosti.malkki@gmail.com>2014-05-08 07:06:00 +0200
commitac9a905cf1e44570a27dea0afd9233b7418d9c1e (patch)
tree8f8a00237840d7b7b17c0d708822da98eda499cb /src
parent8cbf47f12cfbf4ef8130b3e91bc1b29044238af5 (diff)
downloadcoreboot-ac9a905cf1e44570a27dea0afd9233b7418d9c1e.tar.xz
rambi: configure the LPE audio codec clock
Rambi has the LPE audio codec connected to PMC_PLT_CLK[0]. Configure it for 25MHz. BUG=chrome-os-partner:23791 BRANCH=None TEST=Built and booted. Noted message in console output. Change-Id: I11297ba951149e5831c65ca70ac7bdbbed113098 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/178781 Reviewed-by: Shawn Nematbakhsh <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/4987 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/mainboard/google/rambi/devicetree.cb4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index 88785c0032..1c24d57d2d 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -23,6 +23,10 @@ chip soc/intel/baytrail
register "usb2_per_port_lane3" = "0x00049a09"
register "usb2_per_port_rcomp_hs_pullup3" = "0x0300401d"
+ # LPE audio codec settings
+ register "lpe_codec_clk_freq" = "25" # 25MHz clock
+ register "lpe_codec_clk_num" = "0" # PMC_PLT_CLK[0]
+
device cpu_cluster 0 on
device lapic 0 on end
end