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| author | Martin Roth <martin.roth@se-eng.com> | 2014-12-07 22:11:54 -0700 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2014-12-16 00:42:13 +0100 |
| commit | 51dde6fe3b2fec59fd42f36fd025ac09910a3764 (patch) | |
| tree | 1bd23caabc9aa084f8eda1689ce013c20a91e919 /util/inteltool/powermgt.c | |
| parent | cdb61a6f5d2268b059ac56da3b69ad0313f3fb90 (diff) | |
| download | coreboot-51dde6fe3b2fec59fd42f36fd025ac09910a3764.tar.xz | |
inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.
Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers
Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'util/inteltool/powermgt.c')
| -rw-r--r-- | util/inteltool/powermgt.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c index 7cdf452b99..579524bd3f 100644 --- a/util/inteltool/powermgt.c +++ b/util/inteltool/powermgt.c @@ -705,6 +705,7 @@ int print_pmbase(struct pci_dev *sb, struct pci_access *pacc) case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_FULL: case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_PREM: case PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_BASE: + case PCI_DEVICE_ID_INTEL_BAYTRAIL_LPC: pmbase = pci_read_word(sb, 0x40) & 0xff80; pm_registers = pch_pm_registers; size = ARRAY_SIZE(pch_pm_registers); |