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Diffstat (limited to 'Documentation/Intel/development.html')
| -rw-r--r-- | Documentation/Intel/development.html | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/Documentation/Intel/development.html b/Documentation/Intel/development.html index 2b23b39e23..b90fa96567 100644 --- a/Documentation/Intel/development.html +++ b/Documentation/Intel/development.html @@ -71,6 +71,17 @@ <li><a target="_blank" href="SoC/soc.html#EarlyDebug">Early Debug</a></li> <li>Implement and debug the <a target="_blank" href="SoC/soc.html#Bootblock">bootblock</a> code</li> <li>Implement and debug the call to <a target="_blank" href="SoC/soc.html#TempRamInit">TempRamInit</a></li> + <li>Enable the serial port + <ol type="A"> + <li>Power on, enable and configure GPIOs for the + <a target="_blank" href="Board/board.html#SerialOutput">debug serial UART</a> + </li> + <li>Add the <a target="_blank" href="SoC/soc.html#SerialOutput">serial outupt</a> + support to romstage + </li> + </ol> + </li> + <li>Enable <a target="_blank" href="fsp1_1.html#corebootFspDebugging">coreboot/FSP</a> debugging</li> </ol> @@ -106,6 +117,23 @@ Disable: CONFIG_DISPLAY_MTRRS=y, MTRRs displayed after call to TempRamExit </td> </tr> + + + <tr bgcolor="#c0ffc0"> + <th>Board</th> + <th>Where</th> + <th>Testing</th> + </tr> + <tr> + <td>Serial Port</td> + <td> + SoC <a target="_blank" href="SoC/soc.html#SerialOutput">Support</a><br> + Enable: src/soc/mainboard/<Board>/com_init.c/<a target="_blank" href="Board/board.html#SerialOutput">car_mainboard_pre_console_init</a> + </td> + <td>Debug serial output works</td> + </tr> + + <tr bgcolor="#c0ffc0"> <th>FSP</th> <th>Where</th> |